About the role
Syenta is seeking a Senior Process Engineer (Substrate) to support the development of its advanced packaging toolset. The role focuses on process development of Photo Imageable Dielectric (PID) coating and patterning for fine-line circuitry, along with wafer-level processing.
What you'll do
- Develop and optimize Photo Imageable Dielectric (PID) and light-sensitive insulating material processes (such as PV-FX2 HR200) for advanced semiconductor packaging and fine-line circuit patterning.
- Drive multi-layer build-up process development and translate prototype processes into scalable, high-yield manufacturing solutions.
- Execute microfabrication processes including photolithography, etching, thin film deposition, wet processing, and metrology verification.
- Troubleshoot microfabrication defects and analyze experimental data to improve process quality and reproducibility.
- Collaborate with materials scientists, chemists, and engineers, and support transfer of developed processes to commercial fabs.
- Perform basic reliability testing literacy assessments across TCT, HAST, and MSL.
What you'll need
- Bachelor's degree in Physics, Chemistry, Materials Science, Electrical Engineering, Mechanical Engineering, or a related field.
- Minimum 7 years of combined experience in microfabrication processes with demonstrated cleanroom proficiency from an academic or industry background.
- Hands-on experience with photoresist coating, exposure, and development tools and processes.
- Knowledge of PID materials for interposer buildup.
- Experience with etching processes (ICP, RIE, CCP, and wet etching).
- Experience in metallization and thin-film deposition (PECVD, PVD, etc.).
- Experience working in semiconductor-grade cleanroom environments.
Nice to have
- Master's or PhD in Physics, Chemistry, Materials Science, Electrical Engineering, Mechanical Engineering, or a related field.
- 10+ years of combined experience in microfabrication processes with cleanroom proficiency.
- Experience in the semiconductor industry, particularly in advanced packaging or interposer/substrate build-up.
Skills: PID, advanced packaging, photolithography, interposer, substrate build-up
More semiconductor jobs: Packaging engineer jobs
First seen in our index 0 days ago, well below the 60-day median for Packaging Engineering roles.
Packaging Engineering · Advanced Packaging
|
Open roles in category
329
|
Median days since first seen
60 d
|
Category median salary (all employers)
$167k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Syenta | All employers we track in this specialty (329 roles · 65 employers) |
|---|---|---|
| Open roles in this specialty | 4 | 329 |
| Open roles in the wider Process, Fab & Equipment family | 10 | 10736 · 137 employers |
| Median days since first seen | 0 d | 60 d (+60 d vs this employer) |
| Median salary (USD postings) | n/a | $167k |
Skills observed across this category: PID, advanced packaging, photolithography, interposer, substrate build-up
Who's hiring in this category
- Micron Technology · 45 open roles · median 58 d
- KLA Corporation · 39 open roles · median 154 d
- Intel Corporation · 25 open roles · median 29 d
- Renesas Electronics · 23 open roles · median 38 d
- Infineon Technologies · 13 open roles · median 32 d
- Lumilens · 13 open roles · median 99 d
How we counted: 329 open Packaging Engineering (Advanced Packaging) roles from 65 employers tracked in the SemiconductorJobs index, counted 14 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there, and is counted in the wider Process, Fab & Equipment family row. Days are counted from when our index first saw each posting, not from the employer's original posting date.