Originally posted 14 November 2026 by the employer.
About the role
As a Packaging Integration Engineer, you will translate complex silicon, package, and board requirements into manufacturable, reliable solutions across packaging technology, SI/PI, thermal-mechanical engineering, and external manufacturing partners.
What you'll do
- Lead DFM, DFMEA, and related manufacturability and risk reviews for advanced package solutions.
- Drive packaging supply qualification in partnership with OSAT, substrate, and materials suppliers to deliver manufacturable, reliable solutions.
- Coordinate cross-functional engineering discussions spanning silicon design, packaging, SI/PI, thermal-mechanical engineering, quality, and reliability testing.
- Drive issue resolution, align technical decisions, and track actions through closure to keep programs on schedule.
- Integrate silicon, package, and PCB requirements into cohesive system-level solutions.
- Evaluate technical trade-offs across performance, cost, manufacturability, reliability, and schedule.
What you'll need
- Experience in semiconductor packaging technology integration.
- Working knowledge of DFM, DFMEA, and packaging supply qualification with OSAT, substrate, and materials partners.
- Knowledge of package, silicon, and PCB integration and cross-functional technical alignment.
Nice to have
- Demonstrated experience in semiconductor packaging technology integration, including advanced 2.5D/3D integration and IC-package-PCB co-design or co-development.
- Working knowledge of PFMEA alongside DFM, DFMEA, and packaging supply qualification with OSAT, substrate, and materials partners.
- Experience with package design and analysis platforms such as Cadence, Synopsys, Ansys, AutoCAD, or equivalent EDA tools.
- Experience with signal integrity and power integrity (SI/PI) analysis across package and board interconnects.
- Understanding of high-speed I/O design considerations at the package level, including DDR or other memory-interface routing, timing, and packaging constraints.
- Experience with power planes and power delivery network (PDN) optimization across silicon, package, and board, as well as familiarity with UCIe (Universal Chiplet Interconnect Express) and other die-to-die or chiplet interconnect standards.
- Bachelor’s or Master’s degree in Electrical Engineering, Materials Engineering, Mechanical Engineering, Semiconductor Engineering, or a related field.
Skills: DFM, DFMEA, 2.5D/3D, OSAT, SI/PI, UCIe
More semiconductor jobs: AMD jobs · Packaging engineer jobs · California jobs
First seen in our index 0 days ago, well below the 60-day median for Packaging Engineering roles.
Packaging Engineering · Advanced Packaging
|
Open roles in category
329
|
Median days since first seen
60 d
|
Category median salary (all employers)
$167k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | AMD | All employers we track in this specialty (329 roles · 65 employers) |
|---|---|---|
| Open roles in this specialty | 13 | 329 |
| Open roles in the wider Process, Fab & Equipment family | 60 | 10404 · 119 employers |
| Median days since first seen | 36 d | 60 d (+24 d vs this employer) |
| Median salary (USD postings) | n/a | $167k |
Skills observed across this category: DFM, DFMEA, 2.5D/3D, OSAT, SI/PI, UCIe
Who's hiring in this category
- Micron Technology · 45 open roles · median 58 d
- KLA Corporation · 39 open roles · median 154 d
- Intel Corporation · 25 open roles · median 29 d
- Renesas Electronics · 23 open roles · median 38 d
- Infineon Technologies · 13 open roles · median 32 d
- Lumilens · 13 open roles · median 99 d
How we counted: 329 open Packaging Engineering (Advanced Packaging) roles from 65 employers tracked in the SemiconductorJobs index, counted 14 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there, and is counted in the wider Process, Fab & Equipment family row. Days are counted from when our index first saw each posting, not from the employer's original posting date.