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Volantis Semiconductor

Wafer Architect

Volantis Semiconductor Remote friendly (Hybrid Remote/SF Bay Area/Austin/Boston, United States) Full-time 4 months ago
Packaging & Advanced Integration

Originally posted July 31, 2026 by the employer.

About the role

As a Wafer Architect, you will own the logical architecture for the A-0 and A-1 wafer products. You will collaborate with the XPU/Compute chip architect and the memory architect to synthesize the final wafer-level architecture.

What you'll do

  • Own the logical architecture definition for the A-0 and A-1 wafer products.
  • Collaborate with the XPU/Compute chip architect and memory architect to synthesize the final wafer-level architecture.
  • Evaluate the hardware implications of software-level workloads across system, package, network, and die-level boundaries.

What you'll need

  • Deep understanding and hands-on experience in the design process of AI chips (such as GPUs, TPUs, XPUs, or custom ASICs).
  • Understanding of memory sub-systems and interactions in multi-die systems.
  • Understanding of LLM inference workloads at a software level and their implications for hardware systems across system, package, network, and die levels.

Nice to have

  • Experience with multi-die designs.
  • Experience with MCM and chiplet based architectures and architectural partitioning across them.
  • Experience in partitioning workloads across multiple chips and chip packages.

Skills: wafer-scale, chiplet, multi-die, MCM, architecture partitioning

More semiconductor jobs: Advanced packaging jobs

Market context

First seen in our index 0 days ago, well below the 99-day median for Chiplet/Advanced Packaging Design roles.

Chiplet/Advanced Packaging Design · Chiplet Interconnect

Open roles in category
42
Median days since first seen
99 d
Category median salary (all employers)
$222k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How Volantis Semiconductor compares in Chiplet/Advanced Packaging Design hiring
Metric Volantis Semiconductor All employers we track in this specialty (42 roles · 17 employers)
Open roles in this specialty 1 42
Median days since first seen 0 d 99 d (+99 d vs this employer)
Median salary (USD postings) n/a $222k

Skills observed across this category: wafer-scale, chiplet, multi-die, MCM, architecture partitioning

Who's hiring in this category

  • Marvell Technology · 6 open roles · median 38 d
  • Micron Technology · 6 open roles · median 159 d
  • Qualcomm · 5 open roles · median 121 d
  • Intel Corporation · 4 open roles · median 58 d
  • NVIDIA · 4 open roles · median 93 d
  • AMD · 3 open roles · median 99 d

How we counted: 42 open Chiplet/Advanced Packaging Design (Chiplet Interconnect) roles from 17 employers tracked in the SemiconductorJobs index, counted 14 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Days are counted from when our index first saw each posting, not from the employer's original posting date.

Apply now
Hybrid Remote/SF Bay Area/Austin/Boston, United States
Hybrid
Full-time
4 months ago

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