$41,600 - $195,520 USD yearly
Focus on developing compact device models, internal CAD tools, and Static Timing Analysis methodologies for silicon projection.
Originally posted 4 November 2026 by the employer.
About the role
This intern role focuses on developing internal CAD tools and silicon projection methodologies spanning VLSI design, device modeling, and static timing analysis. You will work on software and hardware techniques to project and evaluate pre-silicon timing behavior.
What you'll do
- Research and develop compact device and system models to predict silicon timing behavior, both time-0 and aged, in pre-silicon simulation environments.
- Use machine learning and analytical techniques to speed up device and system timing characterization.
- Develop tools and methodologies to predict and improve silicon performance and reliability beyond industry standard tools.
- Explore how physical effects such as IR drop, crosstalk, aging, and thermal impact influence timing and design decisions.
What you'll need
- Currently enrolled and pursuing a Master's degree or higher in Electrical Engineering, Computer Engineering, or a related field.
- Knowledge in digital circuit design, MOSFET device physics, and Static Timing Analysis.
- Experience in VLSI backend design.
- Understanding of Machine Learning and statistics.
- Knowledge or experience with scripting in Python, Perl, or Tcl.
Nice to have
- Prior VLSI working experience or internships.
- Familiarity with BSIM or other device compact models.
- Coursework or academic projects in VLSI Design or CAD Design.
Skills: Static Timing Analysis, VLSI backend, MOSFET device physics, CAD tools, compact models
More semiconductor jobs: NVIDIA jobs · EDA tools engineer jobs · California jobs
This role has been open 0 days — well below the 66-day median for EDA/CAD Engineering roles.
EDA/CAD Engineering · EDA Tools
|
Open roles in category
723
|
Median days open
66 d
|
Category median salary (all employers)
$187k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | NVIDIA | All employers we track in this specialty (723 roles · 78 employers) |
|---|---|---|
| Open roles in this specialty | 44 | 723 |
| Open roles in the wider Physical Implementation family | 104 | 1603 · 117 employers |
| Median days open | 100 d | 66 d (+34 d vs this employer) |
| Median salary (USD postings) | — | $187k |
Skills observed across this category: Static Timing Analysis, VLSI backend, MOSFET device physics, CAD tools, compact models
Who's hiring in this category
- Cadence Design Systems · 158 open roles · median 161 d
- Synopsys · 59 open roles · median 54 d
- Micron Technology · 48 open roles · median 42 d
- NVIDIA (this employer) · 41 open roles · median 100 d
- Renesas Electronics · 38 open roles · median 13 d
- Qualcomm · 34 open roles · median 86 d
How we counted: 723 open EDA/CAD Engineering (EDA Tools) roles from 78 employers tracked in the SemiconductorJobs index, counted 5 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.