$129,500 - $194,300 USD yearly
Originally posted August 26, 2026 by the employer.
About the role
As a Verification Engineer, you will understand the expected functionality of multimedia designs, specifically Computer Vision hardware IP and subsystems. You will work with system architects, multimedia ASIC designers, and software engineers to plan and execute verification and validation of multimedia subsystems for integration into mobile SoCs.
What you'll do
- Understand the expected functionality of multimedia designs, focusing on Computer Vision hardware IP and subsystems.
- Work with architects, multimedia ASIC designers, and software engineers to plan and execute verification and validation of multimedia subsystems.
- Prepare multimedia subsystems for integration into SoCs for mobile applications.
What you'll need
- Bachelor's degree in Electrical Engineering, Computer Science, Computer Engineering, or a related field with 2+ years of hardware, software, or systems engineering experience (or Master's degree with 1+ year of experience, or PhD).
- 2+ years of experience with ASIC design and verification tools, techniques, and methodology.
Nice to have
- Master's degree in Computer Science, Electrical Engineering, Computer Engineering, or a related field.
- Experience with test planning, debug, and verification of multimedia hardware.
- Working knowledge of HVLs: SystemVerilog, OO programming, Verilog, C/C++, and Tcl/Perl/Python/shell-scripting.
- 2+ years of experience developing block-level testbench environments using SystemVerilog, with coverage-driven constrained random verification.
- 2+ years of experience with verification methodologies such as UVM or OVM.
- 2+ years of experience with scripting and automation using Perl or Python.
- Knowledge or experience with assertion-based formal verification or formal verification.
- Experience with AMBA bus protocols including AXI, AHB, or APB.
Skills: SystemVerilog, UVM, Video DV, ASIC verification, coverage-driven
More semiconductor jobs: Qualcomm jobs · Verification engineer jobs · San Diego jobs
First seen in our index 79 days ago, well above the 59-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1412
|
Median days since first seen
59 d
|
Category median salary (all employers)
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Qualcomm | All employers we track in this specialty (1412 roles · 101 employers) |
|---|---|---|
| Open roles in this specialty | 142 | 1412 |
| Open roles in the wider Digital Design & Verification family | 454 | 3639 · 122 employers |
| Median days since first seen | 50 d | 59 d (+9 d vs this employer) |
| Median salary (USD postings) | n/a | $185k |
Skills observed across this category: SystemVerilog, UVM, Video DV, ASIC verification, coverage-driven
Who's hiring in this category
- Qualcomm (this employer) · 138 open roles · median 52 d
- NVIDIA · 109 open roles · median 74 d
- Apple · 107 open roles · median 17 d
- Synopsys · 90 open roles · median 53 d
- AMD · 81 open roles · median 65 d
- SiFive · 57 open roles · median 72 d
How we counted: 1412 open Design Verification (Design Verification) roles from 101 employers tracked in the SemiconductorJobs index, counted 14 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there, and is counted in the wider Digital Design & Verification family row. Days are counted from when our index first saw each posting, not from the employer's original posting date.