ASIC Characterization Engineer, Silicon
Millimeter wave RF Digital Beamforming (DBF) and RF front-end ASICs.
About the role
This role centers on bench-level RF characterization and ATE correlation to support high-volume production of millimeter wave RF Digital Beamforming (DBF) and RF front-end ASICs. You will own and maintain debug benches, characterize silicon across voltage, temperature, and frequency, and resolve RMA and production issues that cannot be root-caused on a production tester.
What you'll do
- Set up and operate RF test bench equipment including signal generators, spectrum analyzers, vector network analyzers (VNA), oscilloscopes, and power meters.
- Perform bench-level RF characterization including TX/RX gain, noise figure, EVM, and IMRR across voltage, temperature, and frequency.
- Correlate ATE measurements against bench data to identify silicon versus test hardware or test program issues and support lot hold or release decisions.
- Debug RMA returns and field failures at the bench, delivering root cause reports and disposition recommendations.
- Support debug and qualification of load boards and probe cards, including S-parameter verification of signal paths, and support test validation of HTOL boards.
- Maintain golden unit libraries and reference boards, and support knowledge transfer from NPI teams to own test programs after production transfer.
What you'll need
- Experience in hands-on ASIC bench characterization and bench-level RF characterization.
- Experience operating RF test bench equipment including signal generators, spectrum analyzers, vector network analyzers (VNA), oscilloscopes, and power meters.
- Direct experience measuring RF parameters such as TX/RX gain, noise figure, EVM, and IMRR.
- Demonstrated background in correlating ATE measurements against bench data and performing RMA root cause analysis.
- Experience with qualification of load boards and probe cards, including S-parameter verification.
More semiconductor jobs: Amazon jobs · Test engineer jobs · Sunnyvale jobs
First seen in our index 0 days ago, well below the 42-day median for Silicon Test Engineering roles.
Silicon Test Engineering · DFT Test
|
Open roles in category
670
|
Median days since first seen
42 d
|
Category median salary (all employers)
$177k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Amazon | All employers we track in this specialty (670 roles · 86 employers) |
|---|---|---|
| Open roles in this specialty | 2 | 670 |
| Open roles in the wider Silicon Validation & Test family | 10 | 2491 · 122 employers |
| Median days since first seen | 25 d | 42 d (+17 d vs this employer) |
| Median salary (USD postings) | n/a | $177k |
Who's hiring in this category
- Teradyne · 80 open roles · median 43 d
- Renesas Electronics · 51 open roles · median 32 d
- Infineon Technologies · 49 open roles · median 37 d
- Texas Instruments · 34 open roles · median 48 d
- Qualcomm · 33 open roles · median 57 d
- Micron Technology · 27 open roles · median 61 d
How we counted: 670 open Silicon Test Engineering (DFT Test) roles from 86 employers tracked in the SemiconductorJobs index, counted 14 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there, and is counted in the wider Silicon Validation & Test family row. Days are counted from when our index first saw each posting, not from the employer's original posting date.