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Western Digital

Vice President, Platform Engineering

Western Digital San Jose, United States Full-time 1 day ago
Digital Design & SoC Architecture

Originally posted 3 November 2026 by the employer.

About the role

The VP of Engineering for Platforms will lead the engineering organization responsible for designing, developing, and scaling high-density hardware storage architectures, owning the roadmap across ultra-dense JBODs and storage servers. The role oversees a cross-functional department spanning electrical, mechanical, firmware, and manufacturing operations engineering.

What you'll do

  • Direct the development lifecycles of high-capacity storage enclosures from initial concept through architecture, board bring-up, validation, and global high-volume manufacturing.
  • Build, manage, and mentor engineering directors, managers, and principal architects across electrical, mechanical, firmware, and operations domains.
  • Oversee manufacturing engineering and operations teams transitioning designs from the lab to the factory floor, driving Contract Manufacturing execution and acting as executive escalation point.
  • Drive prototype New Product Introduction builds, factory bring-up, and engineering validation tests (EVT/DVT/PVT) through high-volume mass production.
  • Lead technical engagements with silicon suppliers, component vendors, and CM partners to enforce Design for Manufacturability, assembly, and cost-reduction targets.
  • Provide directional oversight on multi-layer PCB design incorporating PCIe Gen 6/7, SAS (12G/24G), SATA, high-speed SERDES, chassis thermal dynamics, airflow, and Power Distribution Networks.

What you'll need

  • Bachelor’s or Master’s degree in Electrical Engineering, Mechanical Engineering, Industrial/Manufacturing Engineering, or a related technical field.
  • 15+ years of hands-on engineering experience, including 8+ years in multi-layered senior management roles leading teams of 50+ employees across the US and Asia handling enterprise hardware platforms and NPI-to-mass-production lifecycles.
  • 8+ years of experience working directly with tier-1 & tier-2 enterprise customers to define requirements and hardware architectures.
  • Demonstrated track record of managing tier-1 global Contract Manufacturers or Original Design Manufacturers to deliver hardware at hyperscale volumes.
  • Technical domain expertise in high-speed signaling interfaces including PCIe Gen 6/7, SAS (12G/24G), SATA, SERDES, multi-layer PCB design, and Power Distribution Networks.
  • Executive communication skills with a proven capability to articulate technical trade-offs across design tolerance, manufacturing yield, and BOM cost.

Skills: Storage enclosures, PCIe Gen 6/7, PCB design, NPI, Hyperscale

More semiconductor jobs: Western Digital jobs · Hardware design jobs

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San Jose, United States
On-site
Full-time
1 day ago

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