Top Level Physical Design Engineer - Austin, Texas, United States
$100,000 - $500,000 USD yearly
Originally posted 16 April 2026 by the employer. Relisted by the employer on 2 May 2026.
About the role
Tenstorrent is seeking a Senior-level Physical Design Engineer to drive top-level implementation of AI and CPU System-on-Chip designs. The position focuses on full-chip physical design closure across floorplans, power grids, and clock networks for RISC-V CPU and AI hardware.
What you'll do
- Drive top-level physical design implementation and chip-level closure for complex AI and CPU System-on-Chip designs.
- Collaborate cross-disciplinarily with architecture, RTL, and packaging teams.
- Implement hierarchical floorplans, fabric routing, power grids, and global clock networks.
- Manage bump planning, RDL implementation, and multi-voltage domain configurations.
- Execute chip-level timing closure, EM/IR analysis, and physical verification while optimizing for power, performance, and area.
What you'll need
- 8+ years of top-level SOC physical design experience on complex, multi-million gate designs.
- Expertise in hierarchical floorplanning, fabric implementation, power grid design, and global clock distribution.
- Experience with bump planning, RDL implementation, and multi-voltage domain designs.
- Experience with timing closure, EM/IR analysis, and physical verification at the chip level.
Skills: synthesis, place and route, timing analysis, power optimization, taped-out designs, advanced node challenges
This role has been open 192 days — well above the 178-day median for Physical Design roles.
Physical Design · Digital Backend
|
Open roles in category
38
|
Median days open
178 d
|
Median salary
—
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See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Tenstorrent | All employers we track in this specialty (38 roles · 22 employers) |
|---|---|---|
| Open roles in this specialty | 2 | 38 |
| Open roles in the wider Physical Implementation family | 12 | 1491 · 109 employers |
| Median days open | 183 d | 178 d (+5 d vs this employer) |
| Median salary (USD postings) | — | — |
Skills observed across this category: synthesis, place and route, timing analysis, power optimization, taped-out designs, advanced node challenges
Who's hiring in this category
- Micron Technology · 4 open roles · median 124 d
- Qualcomm · 4 open roles · median 103 d
- Intel Corporation · 3 open roles · median 16 d
- SiTime · 3 open roles · median 93 d
- Altera · 2 open roles · median 220 d
- Analog Devices · 2 open roles · median 206 d
How we counted: 38 open Physical Design (Digital Backend) roles from 22 employers tracked in the SemiconductorJobs index, counted 25 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.