$198,100 - $268,000 USD yearly
Originally posted 9 July 2026 by the employer.
Formal verification of processor data path designs using SLEC and the ACL2 theorem prover.
About the role
In the Theorem Proving Engineering role, you will analyze data path RTL designs, develop abstract C models, establish equivalence using SLEC, and formally verify correctness against architectural specifications using the ACL2 theorem prover.
What you'll do
- Analyze new data path RTL designs and underlying algorithms. - Develop abstract C models of RTL designs and establish equivalence between RTL and C using SLEC. - Formally verify correctness of models with respect to a high-level architectural specification using the ACL2 theorem prover. - Work closely with designers and verification engineers across various Arm projects to enable theorem proving verification methodologies. - Contribute to verification infrastructure by improving interfaces with SLEC and ACL2. - Evaluate and pursue applications of interactive theorem proving to other components of Arm processors.
What you'll need
- MS or PhD in Computer Science or Mathematics. - Demonstrated strong ability for rigorous mathematical reasoning and familiarity with floating-point arithmetic. - Understanding of standard algorithms and techniques used in the implementation of elementary arithmetic operations. - C programming experience and a reading knowledge of basic Verilog. - Ability to collaborate and contribute in a remote working environment.
Skills: Theorem Proving, RTL designs, C models, formal verification, ACL2 theorem prover, SLEC
This role has been open 102 days — well above the 64-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1220
|
Median days open
64 d
|
Median salary
$186k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Arm Holdings | All employers we track in this specialty (1220 roles · 97 employers) |
|---|---|---|
| Open roles in this specialty | 49 | 1220 |
| Open roles in the wider Digital Design & Verification family | 104 | 3244 · 116 employers |
| Median days open | 105 d | 64 d (+41 d vs this employer) |
| Median salary (USD postings) | — | $186k |
Skills observed across this category: Theorem Proving, RTL designs, C models, formal verification, ACL2 theorem prover, SLEC
Who's hiring in this category
- Qualcomm · 114 open roles · median 41 d
- AMD · 94 open roles · median 52 d
- NVIDIA · 85 open roles · median 62 d
- Synopsys · 65 open roles · median 36 d
- SiFive · 55 open roles · median 78 d
- Cadence Design Systems · 50 open roles · median 120 d
How we counted: 1220 open Design Verification (Design Verification) roles from 97 employers tracked in the SemiconductorJobs index, counted 21 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.