Technical Staff Engineer – Analog Design (Networking) - AZ - Chandler, United States
Analog & Mixed-Signal Design
Originally posted 21 May 2026 by the employer — open 112 days.
About the role
This role involves the specification, architecture, design, and development of integrated circuits for Next-Gen Ethernet and USB products. You will design and architect in-silicon macros for High-Speed Datacom SERDES.
What you'll do
- Define and drive architecture for High-Speed Datacom Ethernet and USB SERDES.
- Design and verify Analog/Mixed-Signal macros for High-Speed Datacom Ethernet and USB SERDES, including ADCs, DACs, PLLs, Transmitters/TX, Receivers/RX, LDOs, Regulators, High Speed I/Os, Bandgap, POR, Oscillator, Charge Pump, Under/Over Voltage Protection, DC-DC Switching Converters, and Analog Switches.
- Perform system and transistor-level design and verification using mixed-mode simulation across multiple scenarios, process corners, and mismatch conditions.
- Develop schematics and run simulations using Cadence Virtuoso.
- Generate block-level and top-level analog/mixed-signal design specifications.
- Define validation plans for post-silicon product-level ATE and lab validation.
What you'll need
- BSEE and a minimum of 15 years of industry experience in Electronics/Electrical Engineering.
- Experience architecting high-speed interfaces such as PCIe, Ethernet, and USB.
- Demonstrated design experience in multiple Analog SERDES sub-blocks, including ADCs, DACs, PLLs, Transmitters/TX, Receivers/RX, LDOs, Regulators, High Speed I/Os, Bandgap, POR, Oscillator, Charge Pump, Under/Over Voltage Protection, DC-DC Switching Converters, and Analog Switches.
- Extensive experience with Cadence and other Analog/Mixed-Signal IC design tools.
- Hands-on lab validation experience using Power Supplies, Source meters, oscilloscopes, and signal generators.
- Proficiency in Cadence Virtuoso IC Design environment.
Nice to have
- Knowledge of Verilog, Liberty timing models, and IBIS-AMI models.
- Experience working in globally distributed design teams.
- Familiarity with DRC/LVS/ERC/PEX/EM analysis tools.
- Experience verifying designs for SOA as well as Aging and SHE effects.
- Experience in Unix/Linux operating systems.
- Experience developing and executing scripts (Scheme, SKILL, Perl/Tcl).
Skills: analog IC design, High-Speed Datacom SERDES, ADCs, DACs, PLLs, Cadence Virtuoso