Originally posted 14 May 2026 by the employer — open 118 days.
This role focuses on high-speed SerDes solutions.
About the role
This role drives customer engagement and technical enablement for high-speed SerDes solutions. You will support the successful adoption and optimization of high-speed interfaces across AI, networking, communications, and high-performance computing platforms.
What you'll do
- Serve as a technical expert for high-speed SerDes technologies and system-level interface performance.
- Support customer engagements, design reviews, technical presentations, and system optimization discussions.
- Develop technical collateral including presentations, application notes, whitepapers, and training material.
- Conduct technical training sessions for internal teams and customers.
- Support benchmarking, channel analysis, SI evaluation, and performance validation activities.
- Stay current with emerging SerDes technologies, protocols, and market trends.
What you'll need
- Experience in SerDes, signal integrity, or high-speed digital design.
- Strong understanding of high-speed protocols such as PCIe, Ethernet, CXL, USB, DisplayPort, and PAM4-based interfaces.
- Experience with SerDes concepts including CDR, CTLE, DFE, FEC, jitter analysis, and link optimization.
- Familiarity with high-speed PCB design and system-level SI considerations.
- Hands-on experience with lab equipment such as oscilloscopes, VNAs, and SerDes debug/evaluation tools.
- Strong written, verbal, and presentation skills with the ability to communicate complex technical concepts clearly.
- Proven ability to work cross-functionally and support customer-focused technical initiatives.
Nice to have
- Experience in customer-facing technical roles within the semiconductor or electronics industry.
- Experience with AI, networking, hyperscale, automotive, or high-performance computing platforms.
- Familiarity with channel simulation, margin analysis, and compliance testing.
Skills: SerDes technologies, high-speed digital design, PCIe, Ethernet, PAM4, jitter analysis
This role has been open 117 days — well above the 91-day median for High-Speed IO/SerDes Design roles.
High-Speed IO/SerDes Design · Serdes Highspeed
|
Open roles in category
217
|
Median days open
91 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | AMD | All employers we track in this specialty (217 roles · 44 employers) |
|---|---|---|
| Open roles in category | 24 | 217 |
| Median days open | 61 d | 91 d (−30 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: SerDes technologies, high-speed digital design, PCIe, Ethernet, PAM4, jitter analysis
Who's hiring in this category
- AMD (this employer) · 24 open roles · median 61 d
- Cadence Design Systems · 19 open roles · median 153 d
- Qualcomm · 17 open roles · median 74 d
- Synopsys · 16 open roles · median 53 d
- Broadcom · 11 open roles · median 142 d
- NVIDIA · 10 open roles · median 95 d
How we counted: 217 open High-Speed IO/SerDes Design (Serdes Highspeed) roles from 44 employers tracked in the SemiconductorJobs index, counted 10 Sept 2026. Figures refresh nightly.