Originally posted 7 May 2026 by the employer. Relisted by the employer on 23 September 2026.

About the role

The Technical Fellow for High-Speed Interconnect and Optics defines and advances NTSG’s system-level interconnect architecture for AI, HPC, and data center platforms. The role covers electrical and optical interconnect technologies spanning ASICs, advanced packaging, boards, optics, and full-system integration.

What you'll do

- Provide technical leadership in high-speed signal integrity (SI) and power delivery network (PDN) design across ASICs, packages, boards, connectors, and optical interfaces at 112G, 224G, and beyond. - Direct end-to-end optical system integration, including optics module architecture, silicon photonics, laser integration, advanced packaging solutions, and thermal and power optimization. - Influence SerDes architecture, specifications, modeling assumptions, and tuning strategies to align ASIC design with channel behavior, optical characteristics, and packaging constraints. - Serve as a technical authority during lab bring-up, characterization, and system debug across SI/PI, optics, firmware, packaging, and system interactions. - Represent AMD in industry standards bodies and consortia such as OIF, IEEE, and PCI-SIG to influence specifications and ecosystem alignment. - Advise senior leadership on critical technical trade-offs, vendor and partner strategy, and product decisions impacting risk, cost, and time-to-market.

What you'll need

- Master’s degree in Computer Science, Electrical Engineering, Photonics, or a related technical field (or equivalent). - Deep expertise in high-speed signal integrity and power integrity (SI/PI, PDN) for data rates at 112G, 224G, and beyond. - Technical background in optical interconnect technologies, including pluggable optics (QSFP, OSFP), Co-Packaged Optics (CPO), Co-Packaged Copper (CPC), and On-Board Optics (OBO). - Experience in optical packaging and system integration, including silicon photonics, laser coupling strategies, and thermal and power management. - Hands-on experience with system bring-up, validation, and debug across ASICs, packages, boards, and optical subsystems. - Knowledge of SerDes architecture, equalization, FEC, and system-level channel modeling.

Nice to have

- PhD in Computer Science, Electrical Engineering, Photonics, or a related technical field. - Track record of publications and patents in high-speed interconnect or optical technologies.

Skills: high-speed interconnect, optical interconnect, co-packaged optics, SerDes, signal integrity, power delivery network

Market context

This role has been open 170 days — well above the 72-day median for High-Speed IO/SerDes Design roles.

High-Speed IO/SerDes Design · Serdes Highspeed

Open roles in category

241

Median days open

72 d

Median salary

$188k

See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring

How AMD compares in High-Speed IO/SerDes Design hiring
Metric	AMD	All employers we track in this specialty (241 roles · 47 employers)
Open roles in this specialty	27	241
Open roles in the wider Analog & Mixed-Signal family	37	1435 · 106 employers
Median days open	43 d	72 d (−29 d vs this employer)
Median salary (USD postings)	—	$188k

Skills observed across this category: high-speed interconnect, optical interconnect, co-packaged optics, SerDes, signal integrity, power delivery network

Who's hiring in this category

Synopsys · 35 open roles · median 37 d
AMD (this employer) · 27 open roles · median 43 d
Qualcomm · 21 open roles · median 67 d
Cadence Design Systems · 20 open roles · median 149 d
Micron Technology · 14 open roles · median 40 d
Apple · 9 open roles · median 26 d

How we counted: 241 open High-Speed IO/SerDes Design (Serdes Highspeed) roles from 47 employers tracked in the SemiconductorJobs index, counted 25 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Analog & Mixed-Signal family row. Figures refresh nightly.

Technical Fellow - High-Speed Interconnect & Optics - CA, Santa Clara, United States