Analog Layout Engineer (eInfochips) - US-TX-Texas (Remote Employees), United States
Originally posted 24 October 2026 by the employer.
High-speed mixed-signal layout for SerDes, ADCs, DACs, and PLLs across TSMC N3 and N5 FinFET nodes.
About the role
The High-Speed Analog Layout Engineer designs the physical silicon layout for high-frequency or high-speed mixed-signal circuits. Work centers on blocks such as SerDes, ADCs, DACs, and PLLs using advanced CMOS and FinFET nodes including TSMC N3, N5, and N7.
What you'll do
- Create block-level and chip-top-level floor plans, manage hierarchical block integration, and handle micro-bump or package-aware co-design. - Address layout-dependent effects (LOD, WPE, LDE), device matching, common-centroid structures, guard rings, and isolation or shielding (coaxial, differential, ground shields). - Ensure complete physical verification closure on DRC (Design Rule Check), LVS (Layout Versus Schematic), ERC, and antenna rules. - Close EM/IR (Electromigration / Infrared drop) reliability analysis and implement ESD protection.
What you'll need
- Bachelor’s degree. - 5 to 12+ years of hands-on custom IC layout experience in deep sub-micron or advanced CMOS/FinFET nodes (such as TSMC N3, N5, N7). - Critical experience working at lower process nodes, specifically N3 and N5. - Demonstrated experience designing physical layout for high-speed mixed-signal circuits such as SerDes, ADCs, DACs, and PLLs. - Hands-on expertise with DRC, LVS, ERC, antenna rules, and EM/IR reliability closure.
Skills: Analog Layout, DRC, LVS, FinFET, Virtuoso
This role has been open 0 days — well below the 32-day median for Analog IC Design roles.
Analog IC Design · Analog Layout
|
Open roles in category
72
|
Median days open
32 d
|
Median salary
$164k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Arrow Electronics | All employers we track in this specialty (72 roles · 23 employers) |
|---|---|---|
| Open roles in this specialty | 1 | 72 |
| Open roles in the wider Analog & Mixed-Signal family | 3 | 1435 · 106 employers |
| Median days open | 0 d | 32 d (−32 d vs this employer) |
| Median salary (USD postings) | — | $164k |
Skills observed across this category: Analog Layout, DRC, LVS, FinFET, Virtuoso
Who's hiring in this category
- Analog Devices · 9 open roles · median 32 d
- Celero · 8 open roles · median 56 d
- Renesas Electronics · 7 open roles · median 21 d
- Marvell Technology · 6 open roles · median 28 d
- Infineon Technologies · 5 open roles · median 9 d
- NXP Semiconductors · 5 open roles · median 18 d
How we counted: 72 open Analog IC Design (Analog Layout) roles from 23 employers tracked in the SemiconductorJobs index, counted 24 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Analog & Mixed-Signal family row. Figures refresh nightly.