Staff/Senior Staff Engineer - AMS Verification - Hyderabad, India

Originally posted 9 April 2025 by the employer — open 519 days.

About the role

This role involves the design verification of IP's /SoC's with an emphasis on verifying and signing off performance and power along with functionality by developing RNM models.

What you'll do

• Work in the AMS Verification domain with relevant experience in mixed signal SOCs or subsystems/IPs.
• Understand and work on all aspects of VLSI Verification cycle including Testbench architecture, Verification Planning, Testbench and Test development, and Verification closure.
• Develop and execute top-level test cases, self-checking test benches and regressions suites.
• Verify block-level and chip-level functionality and performance.
• Develop and validate high-performance behavioral models.

What you'll need

• 10-15 years of industry experience.
• Bachelor or Master's degree in Electrical and/or Computer Engineering.
• Proficiency in at least one of the following languages: Verilog, System Verilog, Verilog AMS.
• Strong understanding of analog circuits, digital design processes, and top-level integration.
• Basic knowledge of PMIC and DC-DC converters.
• Excellent simulation debugging skills, with the ability to analyze waveforms and identify issues in schematics, models, or RTL.
• Proficient in Unix environment and shell scripting, with a basic understanding of Python.

Nice to have

• Experience in SV and UVM testbench development/modifications from a mixed signal perspective.
• Working knowledge of Perl / Skill/ Python/Tcl or other scripting relevant language.
• UVM and assertion knowledge.
• Mentoring skills.

Skills: AMS Verification, mixed signal SOCs, Verilog-A, UVM, analog circuits