Staff Package Layout Engineer - Chandler, Arizona, United States
$198,100 - $268,000 USD yearly
Originally posted 27 October 2026 by the employer.
About the role
Arm is seeking a Staff Package Layout Engineer for the System-in-Package team to assist in the design, development, and verification of package designs. The role supports packaging implementation for SoC designs across IoT, automotive, and compute spaces.
What you'll do
- Develop IC package layouts using established practices for high-speed signal and high-power devices. - Conduct feasibility studies to evaluate package build goals for size, cost, and system performance. - Implement package routing, stack-up creation, reference planes, and power distribution using Cadence APD or the SiP tool suite. - Work independently to resolve complex packaging design problems and adapt to evolving design constraints. - Provide end-user guidance and feedback on methodologies to improve layout efficiency and standardization.
What you'll need
- An Electrical Engineering degree or equivalent work experience. - Experience with 2.5D and 3D package systems and their SI/PI requirements. - 3-5 years of recent experience using Cadence APD & Allegro toolsets. - Awareness of design standardization methods to improve efficiency across layout workflows.
Nice to have
- Familiarity with EDA vendor collaboration, tool evaluation, and issue resolution. - Experience optimizing design methodologies in packaging design.
Skills: package layout, Cadence APD, 2.5D, 3D packaging, SI/PI
This role has been open 0 days — well below the 50-day median for Chiplet/Advanced Packaging Design roles.
Chiplet/Advanced Packaging Design · Advanced Packaging
|
Open roles in category
72
|
Median days open
50 d
|
Median salary
$167k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Arm Holdings | All employers we track in this specialty (72 roles · 25 employers) |
|---|---|---|
| Open roles in this specialty | 2 | 72 |
| Median days open | 0 d | 50 d (−50 d vs this employer) |
| Median salary (USD postings) | — | $167k |
Skills observed across this category: package layout, Cadence APD, 2.5D, 3D packaging, SI/PI
Who's hiring in this category
- AMD · 11 open roles · median 51 d
- Micron Technology · 9 open roles · median 180 d
- NVIDIA · 7 open roles · median 29 d
- Marvell Technology · 6 open roles · median 25 d
- Broadcom · 4 open roles · median 150 d
- GlobalFoundries · 4 open roles · median 118 d
How we counted: 72 open Chiplet/Advanced Packaging Design (Advanced Packaging) roles from 25 employers tracked in the SemiconductorJobs index, counted 28 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.