Originally posted 23 July 2026 by the employer.
About the role
As a Staff NPI Package Design Engineer, you will be responsible for developing packaging solutions for high-performance products including amplifiers, codecs, and DSPs.
What you'll do
- Drive package designs that meet performance, reliability, and manufacturability requirements.
- Define package requirements from electrical, thermal, and mechanical perspectives.
- Utilize AutoCAD, GDS tools, Siemen Fast3D, and Cadence SiP Layout tool for physical design, electrical simulation, and manufacturing validation.
- Establish and maintain design rules for WLCSP, wire bond, and other packages.
- Develop test vehicles to assess bump placement, PCB proximity effects, and WLCSP RDL stack up.
- Collaborate with customers to resolve design issues between the piece part and PCB.
What you'll need
- BS or above in Mechanical, Electrical, Chemical, or Materials Engineering.
- 5 to 8+ years of experience in a packaging-related field.
- Experience with Cadence SiP layout.
- Strong AutoCAD user.
- Knowledge of packaging technologies, materials, package substrate design, and assembly rules.
- Understanding of electrical simulation results on a package design.
Nice to have
- Familiarity or willingness to learn Cadence Virtuoso operation using Unix workstations.
- Conversant with PCB and Die mechanical layout tools (e.g., Siemens Xpedition, Allegro PCB, Cadence Virtuoso).
- Electrical simulation skills.
- Experience using Siemens Fast 3D.
- Experience using Siemens Calibre DRV.
Skills: package designs, die bump array/BGA integration, WLCSP, wire bond, SiP Layout
More semiconductor jobs: Cirrus Logic jobs · Advanced packaging jobs · Taiwan jobs
First seen in our index 113 days ago, well above the 98-day median for Chiplet/Advanced Packaging Design roles.
Chiplet/Advanced Packaging Design · Chiplet Interconnect
|
Open roles in category
44
|
Median days since first seen
98 d
|
Category median salary (all employers)
$206k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Cirrus Logic | All employers we track in this specialty (44 roles · 18 employers) |
|---|---|---|
| Open roles in this specialty | 1 | 44 |
| Median days since first seen | 113 d | 98 d (−15 d vs this employer) |
| Median salary (USD postings) | n/a | $206k |
Skills observed across this category: package designs, die bump array/BGA integration, WLCSP, wire bond, SiP Layout
Who's hiring in this category
- Marvell Technology · 7 open roles · median 51 d
- Micron Technology · 6 open roles · median 158 d
- AMD · 4 open roles · median 56 d
- Intel Corporation · 4 open roles · median 57 d
- NVIDIA · 4 open roles · median 92 d
- Qualcomm · 4 open roles · median 128 d
How we counted: 44 open Chiplet/Advanced Packaging Design (Chiplet Interconnect) roles from 18 employers tracked in the SemiconductorJobs index, counted 13 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Days are counted from when our index first saw each posting, not from the employer's original posting date.