Staff Mixed Signal Verification Engineer - Chandler, United States
Originally posted 10 July 2026 by the employer. Relisted by the employer on 29 September 2026.
Lead chip-level mixed-signal verification and behavioral modeling for PMICs, battery chargers, and switching regulators using SystemVerilog RNM and Verilog-AMS.
About the role
This role is responsible for the verification and modeling of mixed-signal power management devices, including PMICs, battery chargers, switching regulators, and related analog IP. You will lead verification and modeling activities spanning SystemVerilog RNM and Verilog-AMS behavioral models, AMS and DMS simulation, and UVM-based environments.
What you'll do
- Lead chip-level verification of analog and mixed-signal circuits using AMS and DMS methodologies, integrating analog behavioral models with digital RTL and UVM-based environments. - Create, maintain, and validate behavioral models using SystemVerilog RNM and Verilog-AMS, ensuring model accuracy through correlation against specifications and schematic references across operating conditions. - Develop and execute comprehensive verification and modeling plans with full traceability from design requirements through coverage closure and tapeout sign-off. - Own debug and root-cause analysis of mixed-signal verification issues, including failing test cases, model inaccuracies, analog-digital interface problems, convergence issues, and simulation performance bottlenecks. - Support silicon validation and root-cause analysis of complex system-level issues by correlating simulation predictions to bench measurements. - Interface directly with external customers to present verification status, review coverage results, and ensure verification deliverables meet requirements.
What you'll need
- B.S. or M.S. in Electrical Engineering, Computer Engineering, or a related field. - 8-12+ years of experience in mixed-signal verification, AMS/DMS simulation, behavioral modeling, power management IC development, or related semiconductor design activities. - Strong experience with switching regulators, battery chargers, PMICs, SystemVerilog, Verilog-AMS, UVM, Cadence Xcelium, Spectre, and mixed-signal verification sign-off methodologies. - Experience with SystemVerilog RNM behavioral modeling and full-chip DMS verification.
Nice to have
- Experience developing behavioral models and debugging complex analog-digital interactions.
Skills: mixed-signal verification, analog models, SystemVerilog, Verilog-AMS, PMICs, battery chargers
This role has been open 102 days — slightly above the 98-day median for Mixed-Signal Design roles.
Mixed-Signal Design · Mixed Signal
|
Open roles in category
153
|
Median days open
98 d
|
Median salary
$183k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Renesas Electronics | All employers we track in this specialty (153 roles · 40 employers) |
|---|---|---|
| Open roles in this specialty | 1 | 153 |
| Open roles in the wider Analog & Mixed-Signal family | 84 | 1420 · 107 employers |
| Median days open | 102 d | 98 d (+4 d vs this employer) |
| Median salary (USD postings) | — | $183k |
Skills observed across this category: mixed-signal verification, analog models, SystemVerilog, Verilog-AMS, PMICs, battery chargers
Who's hiring in this category
- Analog Devices · 15 open roles · median 82 d
- Infineon Technologies · 13 open roles · median 72 d
- SiTime · 11 open roles · median 210 d
- NVIDIA · 10 open roles · median 37 d
- Apple · 9 open roles · median 6 d
- Microchip Technology · 8 open roles · median 209 d
How we counted: 153 open Mixed-Signal Design (Mixed Signal) roles from 40 employers tracked in the SemiconductorJobs index, counted 21 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Analog & Mixed-Signal family row. Figures refresh nightly.