$134,800 - $202,200 USD yearly
Originally posted 26 May 2026 by the employer. Relisted by the employer on 13 August 2026.
About the role
This role leads the development and enablement of failure analysis test interfaces, advanced socketing, and thermal management solutions in support of Electrical Fault Isolation (EFI). It addresses fault isolation challenges for Cloud, Compute, and Automotive products featuring large package sizes, high pin counts, and advanced packaging technologies.
What you'll do
- Lead failure analysis test interface enablement across Qualcomm product lines, including Mobile, Compute, Automotive, Networking, and AR/VR Embedded platforms. - Proactively plan, develop, and deploy failure analysis hardware, including custom sockets and carrier boards, for both ATE-based and platform-based testing environments. - Define and optimize socket and interface variants to support comprehensive failure analysis test scenarios, ensuring hardware readiness by Silicon on Dock (SOD). - Design, evaluate, and deploy thermal management solutions tailored to failure analysis use cases for high-power (high-TDP) devices. - Utilize thermal and electrical analysis tools to assess the performance, reliability, and feasibility of failure analysis hardware solutions. - Develop detailed hardware specifications and collaborate with internal teams and external suppliers to integrate socketing and thermal solutions into the failure analysis workflow.
What you'll need
- Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience (or Master's degree with 3+ years, or PhD with 2+ years). - Experience developing hardware specifications and interfacing with engineering workflows for hardware design or test interfaces. - Hands-on experience with hardware engineering supporting test environments or failure analysis enablement.
Nice to have
- Master’s degree in Electrical Engineering or related discipline. - In-depth understanding of socketing technologies, power delivery challenges, and signal integrity for advanced semiconductor packages. - Experience supporting failure analysis or debug activities for complex SoCs, high-pin-count devices, or large advanced packages. - Familiarity with thermal analysis and mitigation techniques for high-power semiconductor devices.
This role has been open 150 days — well above the 50-day median for Failure Analysis Engineering roles.
Failure Analysis Engineering · Failure Analysis
|
Open roles in category
204
|
Median days open
50 d
|
Median salary
$107k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Qualcomm | All employers we track in this specialty (204 roles · 40 employers) |
|---|---|---|
| Open roles in this specialty | 3 | 204 |
| Open roles in the wider Process, Fab & Equipment family | 52 | 10039 · 106 employers |
| Median days open | 74 d | 50 d (+24 d vs this employer) |
| Median salary (USD postings) | — | $107k |
Who's hiring in this category
- Micron Technology · 43 open roles · median 51 d
- GlobalFoundries · 16 open roles · median 32 d
- Lam Research · 16 open roles · median 31 d
- Infineon Technologies · 13 open roles · median 31 d
- AMD · 9 open roles · median 92 d
- Intel Corporation · 9 open roles · median 70 d
How we counted: 204 open Failure Analysis Engineering (Failure Analysis) roles from 40 employers tracked in the SemiconductorJobs index, counted 24 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Process, Fab & Equipment family row. Figures refresh nightly.