Staff Engineer, System Validation
$175,000 - $205,000 USD yearly
Ayar Labs pioneers co-packaged optics (CPO) to move data using light instead of electricity.
About the role
This role will spearhead validation efforts to ensure Ayar Labs' products meet and exceed component and system-level requirements. You will drive the transition of technology from initial release to customer deployment, focusing on laser, photonics, CMOS, and system-level concepts.
What you'll do
- Define and implement comprehensive validation methodologies, including developing test plans and defining success criteria.
- Collaborate with Design, Package, and Reliability Engineering for smooth product transition from development to mass production.
- Drive product bring-up, troubleshooting and resolving technical issues for silicon photonic and laser products.
- Perform rigorous design validation through electrical and optical characterization of VLSI integrated circuits and optoelectronic systems.
- Collaborate with multi-disciplinary teams to drive decisions around design trade-offs and specification adjustments.
- Create and maintain software scripts and test hardware stations for efficient validation.
What you'll need
- Bachelor's degree in Electrical Engineering or equivalent.
- 5+ years of experience with component and system test equipment (BERT, DCA, OSA) and standard signal quality metrics (TDECQ, SRS, URS).
- 5+ years of experience in programming languages (Python) for test automation and data analysis.
- Knowledge of communication protocols and standards (Ethernet, PCIe).
- Able to analyze complex technical problems, identify root causes, and develop effective solutions.
- Understanding of data analysis, process control, and statistical methods.
- Experience with SoC validation planning, bring-up, debugging, and optimization.
- Experience with high-speed SerDes and their characterization and optimization.
Nice to have
- Master's or Ph.D. in Electrical Engineering or equivalent.
- 5+ years Industry experience in semiconductor lasers, photonics, system test, and validation.
- Knowledge of optical transceiver packaging and integration challenges.
More semiconductor jobs: Test engineer jobs · San Jose jobs
This role has been open 44 days — slightly above the 39-day median for Silicon Test Engineering roles.
Silicon Test Engineering · DFT Test
|
Open roles in category
638
|
Median days open
39 d
|
Category median salary (all employers)
$176k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Ayar Labs | All employers we track in this specialty (638 roles · 86 employers) |
|---|---|---|
| Open roles in this specialty | 9 | 638 |
| Open roles in the wider Silicon Validation & Test family | 13 | 2395 · 121 employers |
| Median days open | 25 d | 39 d (−14 d vs this employer) |
| Median salary (USD postings) | — | $176k |
Who's hiring in this category
- Teradyne · 83 open roles · median 37 d
- Infineon Technologies · 51 open roles · median 34 d
- Renesas Electronics · 45 open roles · median 33 d
- Texas Instruments · 33 open roles · median 44 d
- Qualcomm · 29 open roles · median 51 d
- Micron Technology · 25 open roles · median 55 d
How we counted: 638 open Silicon Test Engineering (DFT Test) roles from 86 employers tracked in the SemiconductorJobs index, counted 8 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.