Staff Engineer, Serdes Analog Design - San Jose, California, United States
$157,000 - $243,000 USD yearly
Originally posted 16 December 2025 by the employer. Relisted by the employer on 2 October 2026.
Work on high-speed interconnect transceivers spanning UCIe die-to-die interconnect and 224/448Gbps UA-link/Ethernet.
About the role
In this role, you will work on architecture and circuits of high-speed interconnect transceiver (Serdes), Serdes IPs, clock generation, and traditional analog circuits. The focus covers interfaces including display interface, camera sensor interface, UCIe / die-to-die interconnect, and 224/448Gbps UA-link/Ethernet.
What you'll do
- Design low-power and low-voltage analog and custom digital circuit components using advanced CMOS process technologies. - Translate component design specifications to schematics and build simulation test-benches to evaluate circuit performance, functionality, power consumption, and reliability. - Supervise layout designers to generate LVS/DRC clean layout, optimizing layout to improve circuit power consumption and performance. - Perform functionality and performance validation in silicon.
What you'll need
- Bachelor's degree with 10+ years, Master's with 8+ years, or PhD with 5+ years of experience. - Minimum 2+ years of RF/Analog/Serdes SoC design experience. - Knowledge and experience with analog circuits/mixed-signal circuits, including bandgap, LDO, and filters. - Knowledge and experience with circuits of Serdes IPs, including CTLE, DFE, FFE, clock distributions, PI, and IQ generation. - Knowledge of Serdes architecture and high-speed interconnect standards (USB, PCIe, UCIe). - Proficiency with EDA tools such as Cadence, Spectre, Totem, and EMX. - Proficiency with scripting languages including Python and Matlab.
Skills: Serdes, high-speed interconnect, transceiver, analog circuits, UCIe
This role has been open 103 days — well above the 72-day median for High-Speed IO/SerDes Design roles.
High-Speed IO/SerDes Design · Serdes Highspeed
|
Open roles in category
234
|
Median days open
72 d
|
Median salary
$177k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Samsung Semiconductor | All employers we track in this specialty (234 roles · 46 employers) |
|---|---|---|
| Open roles in this specialty | 5 | 234 |
| Open roles in the wider Analog & Mixed-Signal family | 9 | 1420 · 107 employers |
| Median days open | 103 d | 72 d (+31 d vs this employer) |
| Median salary (USD postings) | — | $177k |
Skills observed across this category: Serdes, high-speed interconnect, transceiver, analog circuits, UCIe
Who's hiring in this category
- Synopsys · 31 open roles · median 36 d
- AMD · 26 open roles · median 40 d
- Qualcomm · 20 open roles · median 63 d
- Cadence Design Systems · 19 open roles · median 155 d
- Micron Technology · 15 open roles · median 36 d
- Apple · 12 open roles · median 22 d
How we counted: 234 open High-Speed IO/SerDes Design (Serdes Highspeed) roles from 46 employers tracked in the SemiconductorJobs index, counted 21 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Analog & Mixed-Signal family row. Figures refresh nightly.