Staff Engineer, Serdes Analog Design - San Jose, California, United States
$157,000 - $243,000 USD yearly
Originally posted 16 December 2025 by the employer. Relisted by the employer on 2 October 2026.
Focus on high-speed interconnect transceiver (Serdes) circuits, including UCIe / die-to-die interconnect and 224/448Gbps UA-link/Ethernet.
About the role
This role involves working on the architecture and circuits of high-speed interconnect transceiver (Serdes). You will develop high-performance and low-power Serdes, including display interface, camera sensor interface, UCIe / die-to-die interconnect and 224/448Gbps UA-link/Ethernet.
What you'll do
- Design low-power and low-voltage analog and custom digital circuit components using advanced CMOS process technologies.
- Translate component design specifications to schematics and build simulation test-benches.
- Supervise layout designers for LVS/DRC clean layout and optimize layout.
- Validate functionality and performance in Silicon.
What you'll need
- Bachelors with 10+ years, Masters with 8+ years, or PhDs with 5+ years of experience.
- Minimum 2+ years experience in RF/Analog/Serdes SoC design.
- Knowledge and experience with analog circuits/mixed signal circuits such as bandgap, LDO, filters.
- Knowledge and experience with circuits of Serdes IPs: CTLE, DFE, FFE, clock distributions, PI, IQ generation.
- Knowledge of Serdes architecture and high-speed interconnect standards (USB, PCIe, UCIe).
- Well-versed in EDA tools (Cadence, Spectre, Totem, EMX).
- Comfortable with scripting languages (Python, Matlab).
Skills: Serdes, high-speed interconnect, transceiver, analog circuits, UCIe
This role has been open 85 days — well above the 74-day median for High-Speed IO/SerDes Design roles.
High-Speed IO/SerDes Design · Serdes Highspeed
|
Open roles in category
240
|
Median days open
74 d
|
Median salary
$182k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Samsung Semiconductor | All employers we track in this specialty (240 roles · 49 employers) |
|---|---|---|
| Open roles in this specialty | 4 | 240 |
| Open roles in the wider Analog & Mixed-Signal family | 7 | 1385 · 106 employers |
| Median days open | 137 d | 74 d (+63 d vs this employer) |
| Median salary (USD postings) | — | $182k |
Skills observed across this category: Serdes, high-speed interconnect, transceiver, analog circuits, UCIe
Who's hiring in this category
- AMD · 28 open roles · median 58 d
- Synopsys · 27 open roles · median 25 d
- Cadence Design Systems · 19 open roles · median 176 d
- Qualcomm · 18 open roles · median 54 d
- Apple · 12 open roles · median 4 d
- Micron Technology · 11 open roles · median 63 d
How we counted: 240 open High-Speed IO/SerDes Design (Serdes Highspeed) roles from 49 employers tracked in the SemiconductorJobs index, counted 3 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Analog & Mixed-Signal family row. Figures refresh nightly.