Physical Design & EDA
Originally posted 3 August 2026 by the employer — open 38 days.
About the role
What you'll do
- Maintain, enhance, and support Marvell's Place and Route Flow using industry-standard EDA tools.
- Perform synthesis, place and route, timing analysis, and closure on logic blocks.
- Develop and implement timing and logic ECOs.
- Collaborate with the RTL design team to address congestion and timing issues.
- Debug and resolve block-level timing issues at the partition level.
What you'll need
- Bachelor's, Master's, or PhD degree in Electrical Engineering, Computer Engineering, or a related field.
- 5+ years of experience in physical design with a focus on block-level PNR for advanced CMOS process nodes (e.g., 7nm, 5nm, or below).
- Proficient with industry-standard EDA tools for physical design, including Cadence Genus and Innovus, and Synopsys IC Compiler and Fusion Compiler.
- Strong expertise in static timing analysis tools such as Tempus or PrimeTime and EM/IR-Drop/Crosstalk analysis tools like Voltus or PrimeRail.
- Demonstrated ability to create scripts (Tcl, Perl, Makefile) for automating design processes.
Skills: physical design, block-level PNR, timing analysis, ECOs, EDA tools
Market context
This role has been open 38 days — well below the 57-day median for Physical Design roles.
Physical Design · Physical Design
|
Open roles in category
615
|
Median days open
57 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Marvell Technology | All employers we track in this specialty (615 roles · 74 employers) |
|---|---|---|
| Open roles in this specialty | 22 | 615 |
| Open roles in the wider Physical Implementation family | 41 | 1427 · 104 employers |
| Median days open | 53 d | 57 d (−4 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: physical design, block-level PNR, timing analysis, ECOs, EDA tools
Who's hiring in this category
- Qualcomm · 99 open roles · median 34 d
- NVIDIA · 42 open roles · median 49 d
- Broadcom · 41 open roles · median 59 d
- AMD · 32 open roles · median 46 d
- Synopsys · 28 open roles · median 62 d
- Intel Corporation · 25 open roles · median 61 d
How we counted: 615 open Physical Design (Physical Design) roles from 74 employers tracked in the SemiconductorJobs index, counted 10 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.