Physical Verification Engineer, EDA - Barcelona, ES, Spain
Originally posted 1 October 2026 by the employer.
About the role
This role involves developing and maintaining physical verification rule decks and supporting verification flows for RF ICs, acoustic wave (SAW/BAW) devices, and multi-technology modules.
What you'll do
- Develop and maintain physical verification rule decks (DRC, LVS, ERC).
- Support verification flows across RF IC, SAW/BAW, and module technologies.
- Collaborate with design, R&D, and process teams to debug and improve verification methodologies.
- Enhance EDA flows and infrastructure across industry-standard tools.
- Develop automation scripts (Python) to improve efficiency and scalability.
- Provide support for EDA tools and internal users.
What you'll need
- 2+ years of related experience.
- Understanding of physical verification concepts (DRC, LVS, ERC).
- Familiarity with EDA tools such as Calibre, ICV, or Cadence PVS/Pegasus.
- Programming experience in Python or similar scripting languages.
- Comfortable working in Linux/UNIX environments.
Nice to have
- Internship or academic experience in EDA, physical design, or verification.
- Exposure to RF IC, SAW/BAW, or high-frequency technologies.
- Experience with automation or design workflows.
- Exposure to RF or EM design tools (Virtuoso, ADS, HFSS, etc.).
Skills: physical verification, DRC, LVS, EDA flows, automation scripts, Calibre
This role has been open 0 days — well below the 82-day median for EDA/CAD Engineering roles.
EDA/CAD Engineering · EDA Tools
|
Open roles in category
683
|
Median days open
82 d
|
Median salary
$200k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | QORVO | All employers we track in this specialty (683 roles · 76 employers) |
|---|---|---|
| Open roles in this specialty | 8 | 683 |
| Open roles in the wider Physical Implementation family | 9 | 1436 · 109 employers |
| Median days open | 31 d | 82 d (−51 d vs this employer) |
| Median salary (USD postings) | — | $200k |
Skills observed across this category: physical verification, DRC, LVS, EDA flows, automation scripts, Calibre
Who's hiring in this category
- Cadence Design Systems · 167 open roles · median 162 d
- Synopsys · 49 open roles · median 38 d
- Micron Technology · 41 open roles · median 110 d
- NVIDIA · 41 open roles · median 68 d
- Qualcomm · 36 open roles · median 69 d
- GlobalFoundries · 26 open roles · median 49 d
How we counted: 683 open EDA/CAD Engineering (EDA Tools) roles from 76 employers tracked in the SemiconductorJobs index, counted 1 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.