$198,100 - $268,000 USD yearly
Originally posted 21 October 2026 by the employer.
About the role
Arm is hiring a Staff Design Engineer based in Austin, Texas.
What you'll do
- Collaborate with engineering teams across hybrid working environments to deliver design work. - Participate in technical evaluations and problem solving across assigned design tasks. - Engage with project stakeholders to turn technical ideas into real technology.
What you'll need
- Relevant professional experience in semiconductor hardware design engineering. - Ability to demonstrate authentic technical problem-solving perspective and capabilities. - Experience working collaboratively across hybrid technical teams.
Skills: Staff Design Engineer
This role has been open 0 days — well below the 64-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
1079
|
Median days open
64 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Arm Holdings | All employers we track in this specialty (1079 roles · 103 employers) |
|---|---|---|
| Open roles in this specialty | 25 | 1079 |
| Open roles in the wider Digital Design & Verification family | 118 | 3384 · 117 employers |
| Median days open | 0 d | 64 d (−64 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: Staff Design Engineer
Who's hiring in this category
- Qualcomm · 152 open roles · median 64 d
- Synopsys · 85 open roles · median 41 d
- AMD · 81 open roles · median 42 d
- Analog Devices · 49 open roles · median 57 d
- NXP Semiconductors · 43 open roles · median 97 d
- NVIDIA · 37 open roles · median 47 d
How we counted: 1079 open Digital/RTL Design (RTL Design) roles from 103 employers tracked in the SemiconductorJobs index, counted 28 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.