Staff Analog IC Design Engineer - Bangalore, Karnataka, India

Originally posted 5 October 2026 by the employer.

Design, verify, and validate low-power high speed mixed-signal ICs for automotive Ethernet and automotive serdes.

About the role

As a Staff Analog IC Design Engineer, you will architect, specify, and implement PLL and other sub-systems, contributing to PLL chip-level integration, chip-level simulations, and silicon validation for high speed communication chips.

What you'll do

• Participate in feasibility studies and architecture definitions of new products.
• Generate detailed specifications and verification plans for analog blocks and systems, especially PLL.
• Develop Matlab & Verilog A models of analog blocks related to PLL.
• Develop low-power high speed analog systems Design, verification & Layout supervision.
• Integrate analog blocks into complex mixed-signals System-on-Chip (SoC) designs.
• Perform top-level Mixed-Signal simulations.
• Silicon Evaluation and characterization of designed blocks in the lab.
• Support the production test development and qualification.
• Contribute to design methodology and design flow improvements.

What you'll need

• BSEE, MSEE or Ph.D. with at least 6-10+ years of IC design work experience.
• Extensive experience in high performance complete PLL design from scratch with at least 1 tape out & silicon success.
• Experience in designing low phase noise/jitter integer PLLs, fractional-N synthesizers.
• Good knowledge of band gaps, bias, opamps, LDOs, feedback and compensation techniques.
• Experience in VCO design including LC VCOs.
• Strong knowledge of loop design to optimize for phase noise/jitter, lock time, reference spur, area, power.
• Good knowledge of low noise design techniques and high precision techniques in presence of device mismatch.
• Experience in C/Matlab/VerilogA modeling.
• Understand device physics and demonstrated ability to apply that to optimize noise, power, area, and frequency of PLL blocks.
• System knowledge of Automotive serdes/ethernet and its link budget analysis.
• Good working experience in using spectrum analyzers, oscilloscopes, signal generators, etc. to validate analog designs.
• Experience in working with production test engineers to firm up test plans and design for testability details.
• Experience with IP integration and Mixed-Signal IC verification.

Skills: PLL design, low phase noise/jitter, fractional-N synthesizers, VCO design, Verilog A models, silicon validation