STA Engineer - Bengaluru, Karnataka, India
Originally posted 22 September 2026 by the employer — open 0 days.
About the role
This role involves static timing analysis and timing closure for automotive MCU Cores.
What you'll do
- Analyze and drive timing closure of automotive MCU Cores.
- Develop constraints for block-level and chip-level designs.
- Plan, set up, and manage STA runs, preferably at the chip level.
- Analyze STA reports, derive fixes, and collaborate with the PD team to implement timing ECOs.
- Work with the DFT team to understand DFT architecture and derive test mode constraints.
What you'll need
- Bachelor or Master’s degree in Electrical engineering.
- 3+ years’ experience in STA roles.
- Experience with constraints development of block-level and chip-level designs.
- Understanding of Margins, OCV, timing corners, Group and Path based analysis, Functional and Test Mode constraints merging.
- Experience with IO STA: Deriving constraints from chip/protocol interface specs and analysis.
- Understanding of ILM/ timing models for blocks and Crosstalk analysis.
- Hands-on experience with planning, setting up and managing STA runs for design.
- Hands-on experience with analysis of reports, deriving fixes and working with the PD team to drive timing ECOs.
- Working knowledge of timing signoff tools like Primetime or Tempus.
Skills: STA Engineer, timing closure, constraints development, timing ECOs, Primetime, Tempus
This role has been open 0 days — well below the 61-day median for Physical Design roles.
Physical Design · Physical Design
|
Open roles in category
606
|
Median days open
61 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Texas Instruments | All employers we track in this specialty (606 roles · 78 employers) |
|---|---|---|
| Open roles in this specialty | 4 | 606 |
| Open roles in the wider Physical Implementation family | 16 | 1407 · 108 employers |
| Median days open | 70 d | 61 d (+9 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: STA Engineer, timing closure, constraints development, timing ECOs, Primetime, Tempus
Who's hiring in this category
- Qualcomm · 111 open roles · median 43 d
- Broadcom · 38 open roles · median 71 d
- NVIDIA · 38 open roles · median 46 d
- AMD · 35 open roles · median 41 d
- Synopsys · 27 open roles · median 60 d
- Renesas Electronics · 25 open roles · median 48 d
How we counted: 606 open Physical Design (Physical Design) roles from 78 employers tracked in the SemiconductorJobs index, counted 22 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.