$86,600 - $182,500 USD yearly
About the role
The Sr. Test Engineer builds test infrastructure, develops automated test programs, leads validation strategy, and provides manufacturing ramp support. The role focuses on wafer-level and package-level RF-MEMS testing.
What you'll do
- Build test infrastructure for wafer-level and package-level RF-MEMS testing, including probe-station setups, RF/DC benches, and automated test equipment.
- Develop and maintain automated test programs using LabVIEW, NI TestStand, and C# for scalability, repeatability, and production readiness.
- Lead validation strategy by defining test plans, characterization matrices, DOE structures, and qualification flows.
- Debug test programs, instrument communication, and hardware setups to resolve measurement anomalies and repeatability issues.
- Design, qualify, and maintain probe cards for wafer-level RF-MEMS testing.
- Support manufacturing ramps by transitioning test programs and hardware into production environments to improve throughput.
What you'll need
- Typically 5+ years in semiconductor test engineering, RF test, MEMS test, or mixed-signal ATE development supporting R&D characterization and production test environments.
- Experience with LabVIEW for custom measurement routines, NI TestStand for sequencing and reporting, and C# for instrument drivers and automation frameworks.
- Hands-on experience with wafer-level RF/DC testing, probe-station workflows, and tester calibration.
- Background in motherboard or PCB design/layout, including RF routing, signal integrity, and reading schematics for test boards, probe cards, and driver circuits.
- Experience with probe card design, qualification, and maintenance.
- BS, MS, or PhD in Electrical Engineering, Computer Science, or a related field.
More semiconductor jobs: Test engineer jobs
This role has been open 12 days — well below the 39-day median for Silicon Test Engineering roles.
Silicon Test Engineering · DFT Test
|
Open roles in category
638
|
Median days open
39 d
|
Category median salary (all employers)
$176k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Skyworks | All employers we track in this specialty (638 roles · 86 employers) |
|---|---|---|
| Open roles in this specialty | 17 | 638 |
| Open roles in the wider Silicon Validation & Test family | 65 | 2395 · 121 employers |
| Median days open | 38 d | 39 d (−1 d vs this employer) |
| Median salary (USD postings) | — | $176k |
Who's hiring in this category
- Teradyne · 83 open roles · median 37 d
- Infineon Technologies · 51 open roles · median 34 d
- Renesas Electronics · 45 open roles · median 33 d
- Texas Instruments · 33 open roles · median 44 d
- Qualcomm · 29 open roles · median 51 d
- Micron Technology · 25 open roles · median 55 d
How we counted: 638 open Silicon Test Engineering (DFT Test) roles from 86 employers tracked in the SemiconductorJobs index, counted 8 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.