Sr Staff Package Design Engineer
Originally posted 4 October 2026 by the employer.
Lead package design for advanced IP test chips.
About the role
This role involves leading advanced package design for IP test chips, including package substrate layout, signal integrity, and power integrity analysis.
What you'll do
- Lead four to six test-chip package designs per year from requirements definition through final delivery.
- Define package requirements early in the design cycle, including bump maps, ball maps, and layer stack-up decisions.
- Perform hands-on physical design and layout of advanced package substrates using industry-standard EDA tools.
- Extract electrical models from substrate designs using 3D EM simulation tools like Ansys HFSS and analyze against SI and PI requirements.
- Guide customers through package architecture evaluations and tradeoff analysis.
- Resolve complex package design and integration issues by developing technically sound solutions.
What you'll need
- 10+ years of hands-on experience in semiconductor package design, package substrate layout, or electrical modeling.
- Advanced knowledge of circuit theory and transmission line behavior.
- Demonstrated experience building, validating, and interpreting 3D electromagnetic models using Ansys HFSS or comparable simulation tools.
- Working knowledge of Windows and Linux environments for engineering design and analysis workflows.
- Bachelor's degree in electrical engineering, electronics engineering, or equivalent field.
Nice to have
- Experience with advanced packaging technologies such as 2.5D interposers, fan-out wafer-level packaging, or chiplet integration.
Skills: package substrate layout, 3D EM simulation, signal integrity, power integrity, advanced packaging technologies, chiplet integration
This role has been open 21 days — well below the 50-day median for Chiplet/Advanced Packaging Design roles.
Chiplet/Advanced Packaging Design · Advanced Packaging
|
Open roles in category
71
|
Median days open
50 d
|
Median salary
$167k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Synopsys | All employers we track in this specialty (71 roles · 24 employers) |
|---|---|---|
| Open roles in this specialty | 3 | 71 |
| Median days open | 26 d | 50 d (−24 d vs this employer) |
| Median salary (USD postings) | — | $167k |
Skills observed across this category: package substrate layout, 3D EM simulation, signal integrity, power integrity, advanced packaging technologies, chiplet integration
Who's hiring in this category
- AMD · 11 open roles · median 50 d
- Micron Technology · 9 open roles · median 179 d
- NVIDIA · 7 open roles · median 28 d
- Marvell Technology · 6 open roles · median 24 d
- Broadcom · 4 open roles · median 149 d
- GlobalFoundries · 4 open roles · median 117 d
How we counted: 71 open Chiplet/Advanced Packaging Design (Advanced Packaging) roles from 24 employers tracked in the SemiconductorJobs index, counted 27 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.