Sr Principal Design Engineer - Bangalore, India
Originally posted 1 July 2026 by the employer — open 71 days.
About the role
This role involves leading the design of high-speed SerDes and memory interface circuits, including I/Os, PLLs, clocking, and datapaths.
What you'll do
- Lead complex IP designs and manage cross-functional dependencies.
- Mentor junior engineers.
- Develop high-speed SerDes and memory interface circuits.
- Apply strong Analog Design and I/O Design fundamentals.
What you'll need
- 12-17 years of experience.
- BE/B Tech/ME/M Tech/MS degree.
- In-depth understanding of high-speed Serdes/Memory interface circuits like I/O’s, PLL’s, Clocking, Datapath’s.
- Hands-on experience on PCIe Gen3/4/5/6, GDDRx/DDRx/LPDDRx memory interface circuits.
- Strong Analog Design and I/O Design fundamentals.
- Knowledge of ESD/Reliability/SI/PI.
- Excellent written and verbal communication skills.
- Good problem-solving skills.
Skills: high-speed Serdes, Memory interface circuits, PCIe Gen3/4/5/6, GDDRx/DDRx/LPDDRx, Analog Design, ESD/Reliability/SI/PI
This role has been open 71 days — well below the 91-day median for High-Speed IO/SerDes Design roles.
High-Speed IO/SerDes Design · Serdes Highspeed
|
Open roles in category
217
|
Median days open
91 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Cadence Design Systems | All employers we track in this specialty (217 roles · 44 employers) |
|---|---|---|
| Open roles in category | 19 | 217 |
| Median days open | 153 d | 91 d (+62 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: high-speed Serdes, Memory interface circuits, PCIe Gen3/4/5/6, GDDRx/DDRx/LPDDRx, Analog Design, ESD/Reliability/SI/PI
Who's hiring in this category
- AMD · 24 open roles · median 61 d
- Cadence Design Systems (this employer) · 19 open roles · median 153 d
- Qualcomm · 17 open roles · median 74 d
- Synopsys · 16 open roles · median 53 d
- Broadcom · 11 open roles · median 142 d
- NVIDIA · 10 open roles · median 95 d
How we counted: 217 open High-Speed IO/SerDes Design (Serdes Highspeed) roles from 44 employers tracked in the SemiconductorJobs index, counted 10 Sept 2026. Figures refresh nightly.