Sr. Mixed Signal Design Verification Manager - Richardson, TX, United States
Originally posted 30 June 2026 by the employer.
This role focuses on power-management ICs, including motor driver, power-loss protection, point of load, and battery management IC solutions.
About the role
This role involves managing a team of mixed-signal design verification engineers within Qorvo's Power Management division. The team is responsible for creating power management solutions including power loss protection, PMICs, motor control, and battery management solutions.
What you'll do
- Manage and develop a team of verification engineers.
- Establish technical direction and strategy for verification.
- Serve as customer-facing for power-management ICs, motor driver, power-loss protection, point of load, and battery management IC solutions.
- Develop and execute metric-driven design verification plans based on IC functional, performance, and test specifications.
- Develop constrained random tests and automated checkers within a UVM environment.
- Build high-performance, accurate RNM or VerilogAMS models for top-level simulation.
What you'll need
- Bachelor's degree in electrical engineering or a related field, with a strong focus on mixed-signal circuit design and verification.
- 15+ years of experience in AMS design or verification of analog and power-management ICs.
- Experience managing or being a functional team lead.
- Technical background with hands-on experience in UVM, analog and digital design fundamentals, and system level knowledge of power management ICs.
- Expertise in mixed-signal concepts such as Spice/Spectre, event-based simulator, co-simulation environment, and simulation debug.
Nice to have
- Master's degree in electrical engineering or a related field, with a strong focus on mixed-signal circuit design and verification.
- Experience in Top-Down Design Methodology.
- Proficiency in shell or Python scripting.
- Familiarity with SV-UDN/EENET modeling techniques.
- Experience with both GUI and command-line simulation flows.
- Proficiency with SV Assertions and Functional coverage.
- Understanding integration of AI into a verification workflow.
Skills: mixed-signal design verification, UVM, power-management ICs, VerilogAMS, Spice/Spectre
This role has been open 98 days — below the 99-day median for Mixed-Signal Design roles.
Mixed-Signal Design · Mixed Signal
|
Open roles in category
152
|
Median days open
99 d
|
Median salary
$174k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | QORVO | All employers we track in this specialty (152 roles · 40 employers) |
|---|---|---|
| Open roles in this specialty | 1 | 152 |
| Open roles in the wider Analog & Mixed-Signal family | 73 | 1402 · 107 employers |
| Median days open | 98 d | 99 d (−1 d vs this employer) |
| Median salary (USD postings) | — | $174k |
Skills observed across this category: mixed-signal design verification, UVM, power-management ICs, VerilogAMS, Spice/Spectre
Who's hiring in this category
- Analog Devices · 23 open roles · median 64 d
- Infineon Technologies · 15 open roles · median 83 d
- SiTime · 11 open roles · median 196 d
- NVIDIA · 9 open roles · median 49 d
- Qualcomm · 8 open roles · median 64 d
- Broadcom · 7 open roles · median 48 d
How we counted: 152 open Mixed-Signal Design (Mixed Signal) roles from 40 employers tracked in the SemiconductorJobs index, counted 7 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Analog & Mixed-Signal family row. Figures refresh nightly.