Sr Mgr, PKG Process Integration - Greensboro, NC, United States
Originally posted 25 September 2026 by the employer.
About the role
This role involves leading the Integrated Circuit (IC) Packaging Technologies roadmap and R&D Projects for all of Qorvo's products. It focuses on maintaining technology leadership in packaging design rules for optimizing modules in terms of performance, cost of ownership, and size.
What you'll do
- Lead the IC Packaging Technologies Roadmap for all products.
- Execute R&D Projects for the short- and long-term roadmap.
- Oversee the development and hiring of technical personnel.
- Lead R&D skunkworks technologies for the 3+ years roadmap.
- Ensure Qorvo manufacturing sites are ready with relevant technology, materials, design rules, packaging, and equipment capabilities.
- Maintain technology leadership on packaging design rules for optimizing modules in terms of performance, cost of ownership, and size.
- Implement a system for ideating, qualifying, and deploying technologies for smooth New Product Introduction execution.
What you'll need
- Bachelor’s degree in Electrical Eng.’g., Mechanical Eng.’g., Semiconductors, Materials, or Electronic Engineering, or related field.
- 12 years of experience with Assembly Processes, IC Packaging Technologies, and High-Volume Manufacturing.
- 12 years of experience understanding packaging technologies for diverse packages including DSMBGA, DSMLGA, LGA, MCM, WLCSP, or Leadframe.
- 12 years of experience with Systemic Design Rule Improvement Plan to maintain technology leadership on packaging design rules.
- 12 years of experience with Systemic packaging technology development to implement a system for ideating, qualifying, and deploying technologies for smooth New Product Introduction execution.
- 10 years of management experience in Packaging and Assembly of Semiconductors, and with System in Packages.
- 10 years of experience with assembly processes such as SMT, Die Attach, Wire Bond, Molding, Marking, and Shielding.
- 10 years of experience with methodologies such as Six Sigma, Lean.
- 10 years of High Volume manufacturing experience in semiconductor assembly technologies/products.
Skills: IC Packaging Technologies, R&D Projects, Assembly Processes, High-Volume Manufacturing, packaging design rules, System in Packages
This role has been open 0 days — well below the 70-day median for Packaging Engineering roles.
Packaging Engineering · Packaging
|
Open roles in category
202
|
Median days open
70 d
|
Median salary
$167k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | QORVO | All employers we track in this specialty (202 roles · 42 employers) |
|---|---|---|
| Open roles in this specialty | 6 | 202 |
| Open roles in the wider Process, Fab & Equipment family | 47 | 9466 · 108 employers |
| Median days open | 24 d | 70 d (−46 d vs this employer) |
| Median salary (USD postings) | — | $167k |
Skills observed across this category: IC Packaging Technologies, R&D Projects, Assembly Processes, High-Volume Manufacturing, packaging design rules, System in Packages
Who's hiring in this category
- Infineon Technologies · 28 open roles · median 36 d
- Renesas Electronics · 23 open roles · median 28 d
- Micron Technology · 19 open roles · median 147 d
- Monolithic Power Systems · 12 open roles · median 189 d
- Intel Corporation · 11 open roles · median 154 d
- onsemi · 10 open roles · median 25 d
How we counted: 202 open Packaging Engineering (Packaging) roles from 42 employers tracked in the SemiconductorJobs index, counted 25 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Process, Fab & Equipment family row. Figures refresh nightly.