Originally posted 28 October 2026 by the employer.
HBM/DDR/LPDDR memory interface IP post-silicon bring-up and characterization.
About the role
This role is a Memory PHY post-silicon validation engineer focused on first silicon bring-up within demanding product schedules. The position provides systems engineering and post-silicon support for HBM/DDR/LPDDR memory interface IP.
What you'll do
- Provide systems engineering and post-silicon support for HBM/DDR/LPDDR memory interface IP. - Support bring-up of new products from first silicon in the lab through initial production. - Triage observations from silicon validation and collaborate with ATE, Platform, Firmware, and Characterization teams to root cause and resolve issues. - Provide post-silicon expertise and support in silicon design, process, and integration flows for memory interface IP. - Engage in pre-silicon activities by developing comprehensive test plans and running them in emulation environments. - Characterize memory PHY across PVT to validate functionality and identify opportunities to improve power and performance.
What you'll need
- Bachelor’s or master’s degree in Computer Engineering, Electrical Engineering, a related technical discipline, or equivalent applicable technical experience. - Knowledge of modern, complex processor architecture, digital design, and validation. - Background in pre-silicon test planning and execution within emulation environments. - Experience with post-silicon validation triage, bring-up, and PVT characterization.
Nice to have
- Memory PHY validation experience, including familiarity with firmware and memory IP. - Programming or scripting experience with Python, firmware debugging experience, and familiarity with Linux environments. - Laboratory experience, including hands-on use of oscilloscopes, signal generators, BERT, and logic analyzers. - Experience learning and applying new engineering toolsets, frameworks, and validation methodologies.
Skills: Memory PHY, Post-Silicon, Bring-up, DDR, Oscilloscope
This role has been open 0 days — well below the 42-day median for Post-Silicon Validation roles.
Post-Silicon Validation · Silicon Validation
|
Open roles in category
427
|
Median days open
42 d
|
Median salary
$166k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | AMD | All employers we track in this specialty (427 roles · 63 employers) |
|---|---|---|
| Open roles in this specialty | 57 | 427 |
| Open roles in the wider Silicon Validation & Test family | 146 | 2325 · 114 employers |
| Median days open | 43 d | 42 d (+1 d vs this employer) |
| Median salary (USD postings) | — | $166k |
Skills observed across this category: Memory PHY, Post-Silicon, Bring-up, DDR, Oscilloscope
Who's hiring in this category
- AMD (this employer) · 51 open roles · median 42 d
- Qualcomm · 37 open roles · median 29 d
- Micron Technology · 36 open roles · median 43 d
- NVIDIA · 24 open roles · median 28 d
- Microchip Technology · 22 open roles · median 79 d
- Apple · 21 open roles · median 5 d
How we counted: 427 open Post-Silicon Validation (Silicon Validation) roles from 63 employers tracked in the SemiconductorJobs index, counted 28 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.