Sr Layout Engineer

About the role

This Sr Layout Engineer position is responsible for block level analog circuit design, simulation, schematic capture, layout verification, post-layout extraction and simulation, and top-level integration and verification.

What you'll do

• Perform block level analog circuit design and simulation.
• Conduct schematic capture and layout verification.
• Execute post-layout extraction and simulation.
• Manage top-level integration and verification.

What you'll need

• Solid design knowledge and experience in ADC design: SAR/Delta-Sigma/Counting/Pipelined.
• Solid understanding of transistor level analog and digital circuit theory.
• Good analog integrated circuit implementation skills and knowledge in reducing design risk.
• Proficiency in design tools such as Cadence/Mentor.
• Good knowledge in layout design and extraction, substrate coupling, LatchUp and ESD rules.
• Master Degree (M.S. or M.Eng.) in Electrical Engineering or higher.
• Fluency in English.

Nice to have

• Good design knowledge in Low-Noise Amplifier/Op-amp/RF design.
• Knowledge of digital design flow, digital system, and analog/digital interface and integration.
• Experience in mixed-mode system level simulation (i.e., AMS) on SOC.

Skills: block level analog circuit design, layout verification, post-layout extraction, top-level integration, ADC design, substrate coupling