AMD Vivado and Vitis ecosystems for FPGA-based acceleration across PCIe, CXL, and Ethernet interfaces.
Originally posted 29 October 2026 by the employer.
About the role
Architect and develop hardware and software co-design solutions for FPGA-based acceleration across networking, storage, automotive, aerospace, and AI/ML workloads. The role focuses on designing high-performance hardware acceleration engines and embedded software for ARM Cortex and RISC-V cores.
What you'll do
- Participate in all phases of the product development cycle, from architecture exploration and IP design documentation through prototyping, validation, productization, and support.
- Collaborate with architects, hardware engineers, and firmware engineers to define and develop features.
- Design, verify, and validate high-performance logic using SystemVerilog and Verilog, focusing on data and control paths with interfaces for PCIe (Gen 6/7), CXL, UAL, Ethernet, and DDR5/6.
- Develop firmware and low-level system software for on-chip ARM Cortex (APU/RPU) or RISC-V soft cores, managing IPC, DMA orchestration, and secure boot.
- Integrate custom IP with Network on Chip (NoC), memory, and other subsystems using the AMD Vivado and Vitis tool flows.
- Conduct pre-silicon verification and emulation, followed by lab bring-up, post-silicon validation, and hardware/software debug.
What you'll need
- Bachelor's or Master's degree in Computer Engineering or Electrical Engineering.
- Hands-on experience with FPGAs.
- RTL expertise in SystemVerilog or Verilog, synchronous design, and timing closure for high-speed logic.
- Strong C/C++ skills for bare-metal or RTOS programming on ARM or RISC-V cores.
- Deep knowledge of PCIe, AXI, DDR, and Ethernet protocols.
Nice to have
- Familiarity with CXL or UAL protocols.
- Linux kernel-mode driver development experience.
- Familiarity with UVM-based verification frameworks and emulation platforms such as Palladium, Protium, or Zebu.
- Proficiency with ILAs, high-speed oscilloscopes, and protocol analyzers for hardware debugging.
- Proficiency in Python, Tcl, Makefiles, and shell scripting for automation.
More semiconductor jobs: AMD jobs · RTL design jobs · California jobs
This role has been open 0 days — well below the 63-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
1077
|
Median days open
63 d
|
Category median salary (all employers)
$185k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | AMD | All employers we track in this specialty (1077 roles · 104 employers) |
|---|---|---|
| Open roles in this specialty | 82 | 1077 |
| Open roles in the wider Digital Design & Verification family | 261 | 3314 · 115 employers |
| Median days open | 44 d | 63 d (−19 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Who's hiring in this category
- Qualcomm · 153 open roles · median 65 d
- Synopsys · 86 open roles · median 42 d
- AMD (this employer) · 80 open roles · median 43 d
- Analog Devices · 47 open roles · median 58 d
- NXP Semiconductors · 44 open roles · median 97 d
- NVIDIA · 37 open roles · median 48 d
How we counted: 1077 open Digital/RTL Design (RTL Design) roles from 104 employers tracked in the SemiconductorJobs index, counted 29 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.