Software Development Test Engineer Lead AI Platform - CA, Santa Clara, United States
Originally posted 27 October 2026 by the employer.
About the role
AMD is seeking a Software Development Test Engineer Lead to focus on AI platform optimization, performance improvement of key applications and benchmarks, and hardware-software integration. The role participates in new ASIC and hardware bring-ups and system-level validation.
What you'll do
- Work with AMD architecture specialists to improve future products and target optimization efforts using a data-minded approach. - Participate in new ASIC and hardware bring-ups while staying informed of software and hardware trends across algorithms and architecture. - Debug and fix existing issues and research more efficient methods to accomplish engineering goals. - Develop technical relationships with peers and partners across different teams.
What you'll need
- Bachelor’s or Master's degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent. - Leadership skills to drive sophisticated software engineering issues to resolution across cross-functional teams. - Demonstrated experience participating in new ASIC and hardware bring-ups and debugging system-level issues.
Nice to have
- Experience leading and executing optical transceiver validation activities, including functionality, interoperability, performance, reliability, and compliance testing across multiple platform configurations. - Strong understanding of PCIe architecture, link training, device discovery, and PCIe enumeration mechanisms for system-level validation and debugging. - Experience with PCIe virtualization technologies, including SR-IOV (Single Root I/O Virtualization). - Experience driving platform bring-up, validation, and issue resolution alongside hardware, firmware, and software development teams. - Experience technically leading a validation/platform team, defining priorities, and mentoring engineers. - Proven experience collaborating with remote and geographically distributed teams across multiple time zones.
Skills: optical transceiver, PCIe, SR-IOV, platform bring-up, validation
This role has been open 0 days — well below the 42-day median for Post-Silicon Validation roles.
Post-Silicon Validation · Silicon Validation
|
Open roles in category
433
|
Median days open
42 d
|
Median salary
$167k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | AMD | All employers we track in this specialty (433 roles · 62 employers) |
|---|---|---|
| Open roles in this specialty | 51 | 433 |
| Open roles in the wider Silicon Validation & Test family | 140 | 2249 · 112 employers |
| Median days open | 42 d | 42 d (same as this employer) |
| Median salary (USD postings) | — | $167k |
Skills observed across this category: optical transceiver, PCIe, SR-IOV, platform bring-up, validation
Who's hiring in this category
- AMD (this employer) · 54 open roles · median 46 d
- Qualcomm · 41 open roles · median 28 d
- Micron Technology · 36 open roles · median 42 d
- NVIDIA · 24 open roles · median 27 d
- Microchip Technology · 22 open roles · median 78 d
- Apple · 20 open roles · median 5 d
How we counted: 433 open Post-Silicon Validation (Silicon Validation) roles from 62 employers tracked in the SemiconductorJobs index, counted 27 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.