SoC Power Spec Engineer
Model power dissipation at the SoC level across Neural Engines, CPUs, graphics, and compute accelerators.
About the role
As an SoC Power Spec Engineer within the Silicon Engineering group, you will model power dissipation across IPs and applications at the SoC and system level for Apple products. The role focuses on power modeling and correlation for mobile SoC designs across compute accelerators, graphics, CPUs, and system fabric.
What you'll do
- Model power dissipation at the SoC level, including Neural Engines, CPUs, Graphics, compute (AI/ML) accelerators, media IPs, caches, and fabric.
- Model power dissipation for customer use-cases.
- Interact with System designers, Technology team, Silicon Validation, and Product Engineering teams to define power targets at the SoC level and power delivery.
- Work with the power lab and test teams to correlate models to silicon data.
- Collaborate across architecture, SoC design, and system design teams on silicon optimization.
What you'll need
- Bachelor's degree in a relevant field.
- Minimum of 3 years of relevant industry experience.
Nice to have
- MSEE.
- Deep knowledge of SoC architecture and power modeling.
- Deep understanding of SoC building blocks including CPU, GPU, caches, memory, and media IPs.
- Skills in scripting and data analysis.
- Understanding of VLSI design flow and CMOS technology, with a background in EE.
- Ability to understand and model thermal control loops and throttling mechanisms.
Skills: power modeling, SoC architecture, power dissipation, thermal control loops
More semiconductor jobs: SoC design jobs
This role has been open 0 days — well below the 72-day median for SoC/Chip Architecture roles.
SoC/Chip Architecture · SOC Architecture
|
Open roles in category
469
|
Median days open
72 d
|
Category median salary (all employers)
$233k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Apple | All employers we track in this specialty (469 roles · 66 employers) |
|---|---|---|
| Open roles in this specialty | 48 | 469 |
| Open roles in the wider Digital Design & Verification family | 163 | 3326 · 114 employers |
| Median days open | 20 d | 72 d (−52 d vs this employer) |
| Median salary (USD postings) | — | $233k |
Skills observed across this category: power modeling, SoC architecture, power dissipation, thermal control loops
Who's hiring in this category
- Qualcomm · 79 open roles · median 85 d
- NVIDIA · 52 open roles · median 71 d
- Apple (this employer) · 44 open roles · median 22 d
- AMD · 39 open roles · median 60 d
- Arm Holdings · 30 open roles · median 3 d
- Micron Technology · 21 open roles · median 107 d
How we counted: 469 open SoC/Chip Architecture (SOC Architecture) roles from 66 employers tracked in the SemiconductorJobs index, counted 31 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.