SoC Infrastructure/NoC, Power & Performance Validation Lead, Staff (AI Accelerator Platform)
$145,600 - $218,400 USD yearly
Originally posted September 30, 2026 by the employer.
About the role
Qualcomm's System Validation & Emulation (SVE) team is seeking a validation lead for SoC Infrastructure/NoC, Power, and Performance Validation in pre-silicon emulation and post-silicon platforms. This position focuses on AI Accelerator platform validation, bare-metal validation content development, and system-level performance analysis across HW and SW boundaries.
What you'll do
- Create thorough performance validation plans and analyze SoC bandwidth, QoS, latency, and throughput while factoring in performance-power trade-offs.
- Drive correlation between pre-silicon models, emulation platforms, and silicon performance measurements.
- Design and implement bare-metal drivers, test programs, and automation content in C, Python, and assembly to stress interconnect transactions.
- Evaluate AI inference and training workloads to verify throughput, latency, memory bandwidth, and power-performance efficiency.
- Debug complex hardware and software issues using JTAG-based debuggers, kernel debuggers, and state dump scripts.
- Contribute to methodology development for performance characterization, benchmarking, KPI tracking, and performance dashboards across product generations.
What you'll need
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 4+ years of ASIC design, verification, or validation experience (or Master's with 3+ years, or PhD with 2+ years).
- Experience in silicon validation or platform bring-up.
- Deep technical understanding of interconnect architectures including NoCs, AXI, and AHB, with the ability to write stress tests for upstream and downstream operations.
- Strong knowledge of memory hierarchy, cache coherency, consistency, synchronization, semaphores, MTE, and MPAM.
- Working knowledge of Perfmon architecture, dynamic clock and voltage scaling operations, low power modes, and static/leakage/dynamic power fundamentals.
- Hands-on programming and debugging expertise in C, Python, assembly languages, and JTAG-based debug environments.
Nice to have
- Strong understanding of computer architecture, AI/ML accelerators, memory hierarchy, cache coherency, and on-chip interconnects.
- Knowledge of AI/ML workloads, tensor operations, matrix multiplication, transformer models, and large-scale inference systems.
- Familiarity with system-level debug and silicon bring-up.
Skills: silicon validation, NoC, platform bring-up, power and performance, AXI
More semiconductor jobs: Qualcomm jobs · Silicon validation jobs · San Diego jobs
First seen in our index 44 days ago, slightly above the 42-day median for Post-Silicon Validation roles.
Post-Silicon Validation · Silicon Validation
|
Open roles in category
484
|
Median days since first seen
42 d
|
Category median salary (all employers)
$168k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Qualcomm | All employers we track in this specialty (484 roles · 70 employers) |
|---|---|---|
| Open roles in this specialty | 61 | 484 |
| Open roles in the wider Silicon Validation & Test family | 170 | 2488 · 122 employers |
| Median days since first seen | 44 d | 42 d (−2 d vs this employer) |
| Median salary (USD postings) | n/a | $168k |
Skills observed across this category: silicon validation, NoC, platform bring-up, power and performance, AXI
Who's hiring in this category
- AMD · 66 open roles · median 40 d
- Qualcomm (this employer) · 53 open roles · median 42 d
- Apple · 29 open roles · median 22 d
- Micron Technology · 29 open roles · median 50 d
- NVIDIA · 27 open roles · median 44 d
- Microchip Technology · 21 open roles · median 91 d
How we counted: 484 open Post-Silicon Validation (Silicon Validation) roles from 70 employers tracked in the SemiconductorJobs index, counted 14 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there, and is counted in the wider Silicon Validation & Test family row. Days are counted from when our index first saw each posting, not from the employer's original posting date.