SOC Engineering, Principal Engineer (EMIR)
Originally posted 22 April 2026 by the employer — open 151 days.
About the role
This role involves leading EMIR analysis and signoff closure for advanced process nodes (7nm/5nm/3nm).
What you'll do
- Independently own and drive full EMIR analysis and signoff closure for advanced process nodes (7nm/5nm/3nm).
- Execute PDN implementation, Static & Dynamic Signal/Power EM & IR Drop analysis, Peak Current Analysis, EMIR ECO generation, and full SoC Power Integrity signoff.
- Collaborate with cross-functional teams across geographies to resolve complex design challenges.
- Utilize and optimize Synopsys EDA tools, including Redhawk, Redhawk-SC, PrimeRail, and PrimePower.
- Develop and maintain automation scripts in Python, PERL, TCL, or other relevant languages.
What you'll need
- Bachelor’s or Master’s degree (BE/BTech/MTech or equivalent) in Electronics, Electrical Engineering, or a related field.
- 10+ years of relevant experience in EMIR analysis & signoff closure, particularly in advanced technology nodes (7nm/5nm/3nm).
- Comprehensive hands-on experience with EMIR flows, including PDN design, Static & Dynamic Signal/Power EM & IR Drop analysis with or without vectors, Peak Current Analysis, EMIR ECO generation, and full SoC Power Integrity signoff.
- Proficiency with Synopsys EDA tools such as Redhawk, Redhawk-SC, PrimeRail, and PrimePower.
- Strong scripting and automation skills using Python, PERL, TCL, or similar languages.
- Solid understanding of EMIR, power integrity, reliability concepts, and power-planning techniques.
- Exposure to high-frequency design and low-power design methodologies.
Nice to have
- PDN implementation experience.
Skills: EMIR analysis, signoff closure, PDN implementation, IR Drop analysis, Redhawk
This role has been open 4 days — well below the 59-day median for Physical Design roles.
Physical Design · Physical Design
|
Open roles in category
604
|
Median days open
59 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Synopsys | All employers we track in this specialty (604 roles · 79 employers) |
|---|---|---|
| Open roles in this specialty | 27 | 604 |
| Open roles in the wider Physical Implementation family | 87 | 1373 · 107 employers |
| Median days open | 58 d | 59 d (−1 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: EMIR analysis, signoff closure, PDN implementation, IR Drop analysis, Redhawk
Who's hiring in this category
- Qualcomm · 108 open roles · median 42 d
- NVIDIA · 39 open roles · median 44 d
- Broadcom · 38 open roles · median 69 d
- AMD · 35 open roles · median 39 d
- Synopsys (this employer) · 27 open roles · median 58 d
- Renesas Electronics · 25 open roles · median 46 d
How we counted: 604 open Physical Design (Physical Design) roles from 79 employers tracked in the SemiconductorJobs index, counted 20 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.