SoC DRAM Memory Subsystem Validation Engineering Program Manager - Cupertino, United States
Apple
Cupertino, United States
6 days ago
Product & Program Management
Originally posted 29 September 2026 by the employer.
About the role
This role focuses on driving memory subsystem readiness for custom SoCs, including managing bring-up, validation, and debug of the memory subsystem.
What you'll do
- Drive memory subsystem readiness for custom SoCs.
- Manage bring-up, validation, and debug of the memory subsystem.
- Help craft the DRAM industry's mobile roadmap and drive innovative DRAM technologies.
- Interface with DRAM architecture, Memory Controller Design and DV, DDR PHY, DRAM product engineering, and software teams.
- Ensure sophisticated memory technologies are delivered from architecture to mass production.
What you'll need
- BS + 10 years of relevant experience.
- Prior experience in SOC DRAM Memory Design, Validation, Architecture or Test/Product Engineering.
Nice to have
- Knowledge of high-performance memory subsystem, including SoC memory architecture, sophisticated DDR controller, PHY design and high-speed IO interface, DRAM device, and associated calibration/training mechanisms.
- Experience shipping high volume DRAMs / SoCs.
- Previous experience working with major DRAM memory vendors and validation of DRAM device.
- Excellent debugging skills.
- Ability to understand complex technical discussions and extract action plans.
Skills: SoC DRAM Memory, validation, DDR controller, PHY design, high-speed IO interface, DRAM device