SoC Design Verification Engineer - Austin, United States
Originally posted 27 October 2026 by the employer.
Verifying SoCs driving Apple's Cellular 5G platform.
About the role
As an SoC Design Verification Engineer in Apple's Silicon Engineering Group, you will contribute to verifying SoCs for the Cellular 5G platform.
What you'll do
- Integrate multiple IP-level design verification environments and build reusable UVM testbenches. - Implement coverage-driven test infrastructure to improve tape-out readiness across complex SoCs. - Develop and deploy AIML methodology and new verification tools. - Collaborate across product development teams to verify FW-HW interactions and high-speed layered protocols.
What you'll need
- Bachelor's degree. - Demonstrated knowledge of object-oriented programming principles through coursework, research, or project experience in an OOP-based language such as Python, C++, Java, or SystemVerilog. - Coursework in Digital Design.
Nice to have
- MSEE, MSCS, or beyond. - Coursework in Computer Architecture or Networking Protocol. - Hands-on experience developing UVM-based testbenches in SystemVerilog. - Experience in Digital Design. - Experience developing a reference model of a DUT and verification using HVL.
Skills: UVM, SystemVerilog, OOP, Digital Design, Cellular 5G
This role has been open 0 days — well below the 67-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1268
|
Median days open
67 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Apple | All employers we track in this specialty (1268 roles · 96 employers) |
|---|---|---|
| Open roles in this specialty | 55 | 1268 |
| Open roles in the wider Digital Design & Verification family | 133 | 3359 · 116 employers |
| Median days open | 7 d | 67 d (−60 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: UVM, SystemVerilog, OOP, Digital Design, Cellular 5G
Who's hiring in this category
- Qualcomm · 120 open roles · median 46 d
- NVIDIA · 93 open roles · median 66 d
- AMD · 92 open roles · median 56 d
- Synopsys · 67 open roles · median 42 d
- SiFive · 56 open roles · median 80 d
- Cadence Design Systems · 50 open roles · median 132 d
How we counted: 1268 open Design Verification (Design Verification) roles from 96 employers tracked in the SemiconductorJobs index, counted 27 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.