SMTS (Product Eng) - Chandler, AZ, United States
Originally posted 6 March 2026 by the employer.
Lead NPI product engineering and ATE test program development for discrete and embedded Magnetoresistive RAM (MRAM).
About the role
The SMTS Product Engineer is responsible for NPI development from first silicon through qualification and high-volume production ramp. The role focuses on bringing new discrete and embedded Magnetoresistive RAM (MRAM) products to market across pre-silicon spec definition, wafer sort, final test, and reliability certification.
What you'll do
- Execute first silicon validation, debug, datasheet spec validation, and qualification. - Develop and implement test plans, ATE test programs, multi-site hardware development, product characterization, and high-volume production support. - Collaborate with Design and Operations teams to create and execute characterization and debug plans for circuit validation and screen development. - Work with Process and Device teams to develop yield paretos correlating wafer sort and final test failure mechanisms to bit properties for yield improvement. - Drive reliability and technology certification using standard JEDEC and technology-specific stresses. - Manage and communicate product qualification plans, timelines, and results internally, to external vendors, and as a technical contact for OEMs and customers.
What you'll need
- B.S. or M.S. in Physics, Materials Science, or Electrical Engineering. - Experience with ATE test systems, probers, and test hardware. - Proficiency in data analysis tools such as JMP and programming languages such as Python or C. - Demonstrated track record of product spec validation, reliability characterization, and qualification. - Project management skills with the ability to lead teams, projects, and cross-functional validation efforts.
Nice to have
- Experience with testing memory (DRAM, FLASH, SRAM, or any other emerging memory technology). - Knowledge of magnetic tunnel junction (MTJ) materials and devices.
Skills: MRAM, NPI, ATE test programs, silicon validation, JEDEC
This role has been open 211 days — well above the 59-day median for Product Engineering roles.
Product Engineering · Memory Design
|
Open roles in category
95
|
Median days open
59 d
|
Median salary
$149k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Everspin Technologies | All employers we track in this specialty (95 roles · 13 employers) |
|---|---|---|
| Open roles in this specialty | 1 | 95 |
| Open roles in the wider Silicon Validation & Test family | 1 | 2235 · 112 employers |
| Median days open | 211 d | 59 d (+152 d vs this employer) |
| Median salary (USD postings) | — | $149k |
Skills observed across this category: MRAM, NPI, ATE test programs, silicon validation, JEDEC
Who's hiring in this category
- Micron Technology · 56 open roles · median 82 d
- SanDisk · 14 open roles · median 66 d
- KIOXIA America · 8 open roles · median 27 d
- Solidigm · 4 open roles · median 4 d
- Cadence Design Systems · 3 open roles · median 215 d
- OmniVision · 2 open roles · median 167 d
How we counted: 95 open Product Engineering (Memory Design) roles from 13 employers tracked in the SemiconductorJobs index, counted 26 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.