About the role
This role owns silicon bringup, debug, and end-to-end characterization to take custom silicon devices from first power-on to production readiness. You will work within a cross-functional team spanning analog design, logic design, and package design.
What you'll do
- Lead silicon bringup for new silicon tape-outs from first power-on through functional validation.
- Develop and execute structured test plans covering functional, electrical, and performance validation.
- Characterize analog and digital circuit behavior against the product spec.
- Build automated test infrastructure using Python or Perl for high-throughput characterization.
- Debug complex mixed-signal devices across power, clocking, and mixed-signal interfaces using oscilloscopes, logic analyzers, spectrum analyzers, and protocol analyzers.
- Validate high-speed interfaces, including signal integrity analysis, and root-cause issues across design, process, and board-level failures.
What you'll need
- BS, MS, or PhD in Electrical Engineering.
- 2–8 years of hands-on chip or system bringup and validation experience.
- Proficiency in Python or Perl for test automation and data analysis.
- Experience validating high-speed serial interfaces.
- Understanding of analog fundamentals such as signal integrity, transmission lines, feedback theory, and voltage/current source compliance testing.
- Understanding of frequency domain and time-domain measurements and correlations.
- Solid analog circuit knowledge of bias networks, LDOs, PLLs, ADCs/DACs, and mixed-signal interfaces, with hands-on bench debug skills.
- Ability to read and interpret schematics, layout files, and datasheet specs.
Nice to have
- PVT corner characterization and yield analysis experience.
- Prior experience taping out a custom ASIC from prototype to production.
- Reliability testing exposure to HTOL, ELFR, and ESD/latch-up.
Skills: silicon bringup, characterization, test plans, mixed-signal debug, high-speed interfaces
More semiconductor jobs: Silicon validation jobs · Sunnyvale jobs
This role has been open 112 days — well above the 39-day median for Post-Silicon Validation roles.
Post-Silicon Validation · Silicon Validation
|
Open roles in category
466
|
Median days open
39 d
|
Category median salary (all employers)
$168k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Lyte AI | All employers we track in this specialty (466 roles · 66 employers) |
|---|---|---|
| Open roles in this specialty | 1 | 466 |
| Open roles in the wider Silicon Validation & Test family | 6 | 2395 · 121 employers |
| Median days open | 112 d | 39 d (+73 d vs this employer) |
| Median salary (USD postings) | — | $168k |
Skills observed across this category: silicon bringup, characterization, test plans, mixed-signal debug, high-speed interfaces
Who's hiring in this category
- AMD · 62 open roles · median 39 d
- Qualcomm · 39 open roles · median 36 d
- Micron Technology · 31 open roles · median 46 d
- Apple · 30 open roles · median 16 d
- NVIDIA · 26 open roles · median 39 d
- Microchip Technology · 23 open roles · median 85 d
How we counted: 466 open Post-Silicon Validation (Silicon Validation) roles from 66 employers tracked in the SemiconductorJobs index, counted 8 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.