Originally posted 7 August 2026 by the employer.
About the role
This role delivers signal integrity solutions for large, complex high-speed platforms, boards, and packages. It involves developing a viable space for all interconnects, including 2D and 3D models of electrical structures for the entire die-to-die interconnect.
What you'll do
- Deliver signal integrity solutions for high-speed platforms, boards, and packages.
- Develop 2D and 3D model extractions of electrical structures for die-to-die interconnects.
- Define signal integrity rules, review implementation, and document characterization and measurement reports.
- Perform simulations of interconnects and guide package and platform physical implementation.
- Design and characterize test structures using high-speed equipment to correlate simulations and measurements.
- Develop electrical specifications and new industry standard interconnect specifications to guide consortiums.
What you'll need
- Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field.
- 8+ years of experience with a Bachelor's degree, 6+ years with a Master's degree, or 4 years with a PhD.
- Proficiency in signal integrity analysis, including simulations and validation techniques.
- Hands-on experience with 3D EM solvers and 3D modeling tools.
- Strong understanding of PCB and package design principles.
- Expertise in electrical validation and debug practices.
- Technical proficiency in noise glitch and signal/power integrity analysis.
Nice to have
- Advanced knowledge of systems engineering fundamentals related to signal delivery design and evaluation.
- Familiarity with DDR and SERDES interfaces, such as LPDDR5x/6, GDDR6/7, PCIe Gen5/6/7, PAM-4 SerDes, UCIe, UAL, I3C, SVID.
- Experience developing electrical interface specifications and collaborating with industry consortiums.
Skills: signal integrity, power integrity, 3D EM solvers, PCB design, SERDES interfaces, PCIe Gen5/6/7
This role has been open 53 days — well below the 76-day median for High-Speed IO/SerDes Design roles.
High-Speed IO/SerDes Design · Serdes Highspeed
|
Open roles in category
239
|
Median days open
76 d
|
Median salary
$177k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Intel Corporation | All employers we track in this specialty (239 roles · 49 employers) |
|---|---|---|
| Open roles in this specialty | 6 | 239 |
| Open roles in the wider Analog & Mixed-Signal family | 11 | 1385 · 107 employers |
| Median days open | 152 d | 76 d (+76 d vs this employer) |
| Median salary (USD postings) | — | $177k |
Skills observed across this category: signal integrity, power integrity, 3D EM solvers, PCB design, SERDES interfaces, PCIe Gen5/6/7
Who's hiring in this category
- AMD · 28 open roles · median 64 d
- Synopsys · 26 open roles · median 44 d
- Qualcomm · 20 open roles · median 58 d
- Cadence Design Systems · 18 open roles · median 181 d
- Apple · 12 open roles · median 7 d
- NVIDIA · 11 open roles · median 116 d
How we counted: 239 open High-Speed IO/SerDes Design (Serdes Highspeed) roles from 49 employers tracked in the SemiconductorJobs index, counted 30 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Analog & Mixed-Signal family row. Figures refresh nightly.