Signal Integrity Engineer – Memory Interface
About the role
This role is responsible for memory interface signal integrity for Apple mobile device SoCs, spanning from package to board.
What you'll do
- Work on electrical and physical design of memory systems.
- Execute electrical extraction and validation of package and MLB.
- Collaborate with circuit and controller teams to optimize memory system design.
- Perform SI and PI modeling, simulation, and characterization for memory interfaces.
- Develop and execute test plans to validate signal and power integrity.
- Work with product engineering and system engineering to debug and improve product yield.
What you'll need
- Bachelor's degree in engineering or a related field.
Nice to have
- MSEE with 5+ years of industry experience, or a Ph.D.
- Familiarity with signal and power integrity issues of memory interfaces.
- Experience with product package/board design and analysis, PI/SI methodology development, and lab correlation/validation of simulation results.
- Experience with lab equipment, including VNA, TDR, real-time scope, and spectrum analyzer.
- Strong fundamentals in 3D/2D EM simulation tools and transmission line theory.
- Proficiency in Python with strong foundational coding skills and experience leveraging generative AI coding assistants.
Skills: Signal Integrity, Power Integrity, Memory Interface, EM simulation, VNA
More semiconductor jobs: Apple jobs · Signal integrity jobs
This role has been open 0 days — well below the 78-day median for High-Speed IO/SerDes Design roles.
High-Speed IO/SerDes Design · Serdes Highspeed
|
Open roles in category
249
|
Median days open
78 d
|
Category median salary (all employers)
$207k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Apple | All employers we track in this specialty (249 roles · 50 employers) |
|---|---|---|
| Open roles in this specialty | 8 | 249 |
| Open roles in the wider Analog & Mixed-Signal family | 75 | 1538 · 113 employers |
| Median days open | 10 d | 78 d (−68 d vs this employer) |
| Median salary (USD postings) | — | $207k |
Skills observed across this category: Signal Integrity, Power Integrity, Memory Interface, EM simulation, VNA
Who's hiring in this category
- Synopsys · 34 open roles · median 39 d
- AMD · 24 open roles · median 45 d
- Cadence Design Systems · 21 open roles · median 149 d
- Qualcomm · 17 open roles · median 83 d
- NVIDIA · 16 open roles · median 210 d
- Micron Technology · 10 open roles · median 49 d
How we counted: 249 open High-Speed IO/SerDes Design (Serdes Highspeed) roles from 50 employers tracked in the SemiconductorJobs index, counted 5 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Analog & Mixed-Signal family row. Figures refresh nightly.