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Lattice Semiconductor

Senior Technology Engineer - San Jose, CA, United States

Lattice Semiconductor San Jose, CA, United States 2 months ago
Analog & Mixed-Signal Design

$211,200 USD yearly

Originally posted 19 August 2026 by the employer. Relisted by the employer on 28 October 2026.

About the role

This role is responsible for the interface between engineering and external foundries to enable process adoption, PDK readiness, and on-time tape-out.

What you'll do

- Serve as the primary technical interface to foundries, driving technical alignment, issue resolution, and escalations. - Partner with EDA teams on procurement, validation, and rollout of PDKs, models, and technology collateral. - Ensure design and signoff flows align with foundry requirements, including DRC/LVS, EM/IR, ESD, SI/PI, and reliability. - Own device test structure definition and support silicon characterization to validate process assumptions. - Establish and scale processes for managing technology collateral, documentation, and design methodology consistency across programs.

What you'll need

- BS, MS, or PhD in Electrical Engineering or a related field. - 10+ years in semiconductor technology and foundry interfacing roles. - Deep understanding of advanced process nodes and device physics. - Proven ability to work with external partners, including foundry, EDA, and IP vendors. - Cross-functional collaboration and communication skills.

Nice to have

- Direct experience with TSMC and Samsung foundry ecosystems. - Strong understanding of CAD/EDA flows covering PDK, reliability, ESD, EM/IR, and SI/PI. - Experience supporting tape-out and silicon validation across multiple nodes.

Skills: analog IC design, mixed-signal, SerDes, PLLs, FinFET

Market context

This role has been open 70 days — exactly the 70-day median for Analog IC Design roles.

Analog IC Design · Analog Design

Open roles in category
314
Median days open
70 d
Median salary
$143k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How Lattice Semiconductor compares in Analog IC Design hiring
Metric Lattice Semiconductor All employers we track in this specialty (314 roles · 52 employers)
Open roles in this specialty 3 314
Open roles in the wider Analog & Mixed-Signal family 4 1551 · 108 employers
Median days open 98 d 70 d (+28 d vs this employer)
Median salary (USD postings) — $143k

Skills observed across this category: analog IC design, mixed-signal, SerDes, PLLs, FinFET

Who's hiring in this category

  • Texas Instruments · 34 open roles · median 71 d
  • Analog Devices · 30 open roles · median 36 d
  • Micron Technology · 26 open roles · median 92 d
  • Renesas Electronics · 23 open roles · median 43 d
  • NXP Semiconductors · 17 open roles · median 100 d
  • Skyworks · 16 open roles · median 32 d

How we counted: 314 open Analog IC Design (Analog Design) roles from 52 employers tracked in the SemiconductorJobs index, counted 28 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Analog & Mixed-Signal family row. Figures refresh nightly.

Apply now
San Jose, CA, United States
On-site
$211,200 USD yearly
2 months ago

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