Analog & Mixed-Signal Design
Originally posted 27 May 2026 by the employer — open 106 days.
Focus on key analog and mixed-signal blocks for edge computing SoCs.
About the role
This role involves leading the development of key analog and mixed signal blocks for edge computing SoCs. It requires a strong background in CMOS design from initial system architecture to post-silicon lab bench analysis.
What you'll do
- Architect and design performance critical analog and mixed signal blocks including DACs and ADCs.
- Own schematic design and simulation at the IP and system level to meet performance, area, power, and reliability targets.
- Supervise circuit layout through close collaboration with layout engineers on floor planning, device matching, routing, shielding, and ESD strategies.
- Work with the system design team to translate top-level product requirements into detailed block-level budgets and circuit specifications.
- Supervise validation and debug, including lab bring up, bench measurement, correlation to simulations, and root-cause analysis of silicon issues.
- Collaborate with foundry technology team to ensure proper use of PDKs and models, focusing on device reliability constraints.
What you'll need
- 12 years experience designing high speed and analog circuits including DACs, ADCs, bandgaps, high accuracy bias blocks, and comparators.
- Broad experience in the development of both sigma-delta and SAR based ADC architectures.
- Proficiency with industry-standard design tools, including Cadence Virtuoso, Spectre, and Matlab.
- Hands-on experience with lab testing and debug of analog blocks.
- Hands-on experience in scripting and automation (Skill, Python, Tcl).
- Strong fundamentals with respect to circuit theory, design, and layout including noise, linearity, device non-idealities, parasitics, and on-chip matching networks.
- BSEE minimum from an accredited engineering school.
Nice to have
- MSEE preferred from an accredited engineering school.
Skills: analog IC design, DACs, ADCs, Cadence Virtuoso, lab testing, CMOS design