Senior Staff Package Design Engineer - Tempe, United States

Originally posted 25 August 2026 by the employer.

Design and develop packaging for Power SiP/modules, flip-chip LGA, and multi-chip modules with embedded die/capacitor.

About the role

As a Senior Staff Package Design Engineer, you will design and develop package and interconnect methods, focusing on Power SiP/modules, flip-chip LGA, and multi-chip modules with substrate or embedded die/capacitor, as well as power device packaging.

What you'll do

• Design and develop package and interconnect methods for various packaging needs.
• Qualify package technologies for consumer, industrial, and automotive power applications.
• Benchmark, select, and qualify suitable materials, processes, and assembly subcontractors (OSAT) or contract manufacturers (CM).
• Work with OSAT/CM to develop and optimize processes, and establish process specifications.
• Resolve process integration issues and ensure smooth transition into production with ramp-up monitoring.
• Develop and maintain technical expertise in advances and innovations in power SiP/modules, wafer level packaging, and flip chip interconnects in LGA.
• Participate in packaging roadmap development and focus on execution.

What you'll need

• Doctorate/Masters/Bachelor’s Degree in Physics, Chemistry, Mechanical, Electrical, or Materials Engineering.
• 10-15 years of relevant experience in package development emphasizing power SiP/module, wafer level, and flip-chip LGA packaging.
• Strong understanding of power SiP/modules with substrate or embedded die/capacitor.
• Knowledge of assembly process knowledge, qualification methods, SPC, and statistical analysis software.

Nice to have

• Knowledge of Cu FSM/BGBM technologies.

Skills: Power SiP/modules, flip-chip LGA, multi-chip module, embedded die/capacitor, assembly process knowledge, wafer level packaging