Career Accelerator Program - Packaging Engineer - PhD - Santa Clara, CA, United States
Originally posted 14 October 2026 by the employer.
About the role
This role involves participating in the Career Accelerator Program (CAP) to gain professional and technical training and resources, while contributing to the design, development, and analysis of semiconductor packaging technologies.
What you'll do
- Partner with businesses to design and develop internal and external solutions for semiconductor packaging technologies, including Wirebond, Flip Chip, Modules, SIPs, and other advanced packages.
- Participate in cross-functional teams to support product qualification and production, ensuring reliability and yield requirements, design testability, and test coverage.
- Direct design-of-experiments and collaborate with material suppliers to select innovative packaging materials to enhance reliability and performance of advanced packages.
- Conduct electrical, mechanical, and thermal models to understand silicon-to-package interaction, establish design rules, and predict and prevent high-risk designs.
What you'll need
- PhD in Material Science, Mechanical Engineering, Chemical Engineering, Materials Science, Physics, Electrical Engineering, or a related field.
- Cumulative 3.0/4.0 GPA or higher.
Nice to have
- Coursework or research in semiconductor packaging/fabrication.
- Experience with AutoCAD design and FEM modeling.
- Strong fundamentals in heat transfer, thermodynamics, and stress analysis.
- Experience with Semiconductor MEMS/3D integration design and fabrication.
- Project experience in CVD, PVD, thin film deposition, electroplating, plasma etch, ML based package design, wafer bumping, or optical packaging.
- Experience with plating, adhesion, and surface treatment processes.
- Hands-on experience with semiconductor fabrication and characterization tools including VI Scopes, X-ray Inspection, materials characterization, and FA techniques.
This role has been open 0 days — well below the 61-day median for Packaging Engineering roles.
Packaging Engineering · Advanced Packaging
|
Open roles in category
300
|
Median days open
61 d
|
Median salary
$167k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Texas Instruments | All employers we track in this specialty (300 roles · 60 employers) |
|---|---|---|
| Open roles in this specialty | 8 | 300 |
| Open roles in the wider Process, Fab & Equipment family | 242 | 9855 · 109 employers |
| Median days open | 21 d | 61 d (−40 d vs this employer) |
| Median salary (USD postings) | — | $167k |
Who's hiring in this category
- KLA Corporation · 43 open roles · median 125 d
- Micron Technology · 37 open roles · median 35 d
- Renesas Electronics · 19 open roles · median 44 d
- Infineon Technologies · 16 open roles · median 63 d
- Intel Corporation · 16 open roles · median 60 d
- GlobalFoundries · 14 open roles · median 57 d
How we counted: 300 open Packaging Engineering (Advanced Packaging) roles from 60 employers tracked in the SemiconductorJobs index, counted 14 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Process, Fab & Equipment family row. Figures refresh nightly.