Senior Staff Package Design Engineer - Austin, United States
Originally posted 27 October 2026 by the employer.
About the role
The Senior Staff Package Design Engineer designs and develops package and interconnect methods for Renesas’s packaging needs in Power SiP/modules, wafer level, flip-chip, multi-chip module, and power device packaging. The role qualifies package technologies for consumer, industrial, and automotive power applications.
What you'll do
- Design and develop package and interconnect solutions for Power SiP/modules, wafer level packaging, flip-chip, and multi-chip modules. - Benchmark, select, and qualify materials, processes, and assembly subcontractors (OSAT) or contract manufacturers (CM). - Work with OSAT and CM partners to develop processes, run DOE to optimize operations, and establish process specifications. - Collaborate with Product groups and Reliability teams to qualify new packages and processes within target schedules. - Resolve process integration issues through process window checks on critical manufacturing steps and implement ramp-up monitoring. - Establish and maintain package design rules and production controls.
What you'll need
- Bachelor of Engineering degree in Physics, Chemistry, Mechanical, Electrical, Materials Engineering, or a related field. - 10-15 years of relevant package development experience emphasizing power SiP/module, wafer level, and flip-chip packaging. - Deep understanding of power SiP/modules, wafer level/flip-chip packaging methods, assembly processes, qualification methods, SPC, and statistical analysis software. - Experience running DOE and establishing process specifications with OSAT or CM partners.
Nice to have
- Master's or Doctorate degree in Physics, Chemistry, Mechanical, Electrical, Materials Engineering, or a related field. - Knowledge of wire-bonding and multi-chip module technologies.
Skills: Power SiP, Wafer Level Packaging, Flip-Chip, OSAT, DOE
This role has been open 0 days — well below the 58-day median for Packaging Engineering roles.
Packaging Engineering · Packaging
|
Open roles in category
214
|
Median days open
58 d
|
Median salary
$165k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Renesas Electronics | All employers we track in this specialty (214 roles · 41 employers) |
|---|---|---|
| Open roles in this specialty | 31 | 214 |
| Open roles in the wider Process, Fab & Equipment family | 198 | 10147 · 107 employers |
| Median days open | 36 d | 58 d (−22 d vs this employer) |
| Median salary (USD postings) | — | $165k |
Skills observed across this category: Power SiP, Wafer Level Packaging, Flip-Chip, OSAT, DOE
Who's hiring in this category
- Renesas Electronics (this employer) · 30 open roles · median 39 d
- Infineon Technologies · 25 open roles · median 43 d
- Micron Technology · 21 open roles · median 42 d
- onsemi · 17 open roles · median 32 d
- Intel Corporation · 11 open roles · median 111 d
- Monolithic Power Systems · 11 open roles · median 221 d
How we counted: 214 open Packaging Engineering (Packaging) roles from 41 employers tracked in the SemiconductorJobs index, counted 27 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Process, Fab & Equipment family row. Figures refresh nightly.