Skip to main content
Samsung Semiconductor

Senior Staff Engineer, Layout Design

Samsung Semiconductor San Jose, California, United States Full-time 1 day ago
Digital Design & SoC Architecture

$189,000 - $301,000 USD yearly

Originally posted 3 November 2026 by the employer.

About the role

The Senior Staff Engineer of Layout Design will focus on layout design to develop memory technology.

What you'll do

  • Design memory unit cell array, core layout, and control logic layout.
  • Build parametric cells for layout to improve design efficiency and standardization.
  • Collaborate with process integration and design engineers for core design architecture and technology co-optimization.
  • Develop test element group layout for electrical test structures.
  • Customize and improve DRCs for technology development.
  • Support the tape-out process across database transfer and integration.
  • Document design details and drive technical interactions with internal and external customers.

What you'll need

  • BS with 15+ years of industry experience, MS with 12+ years of industry experience, or PhD with 10+ years of industry experience.
  • 10+ years of layout design engineering experience.
  • Knowledge of basic Si process and device principles.
  • Proficiency with industry design software and tools, including Calibre DRC and LVS.

Skills: layout design, memory unit cell array, Calibre DRC, LVS, parametric cells

More semiconductor jobs: Samsung Semiconductor jobs · San Jose jobs

Market context

This role has been open 0 days — well below the 69-day median for Memory Design roles.

Memory Design · Memory Design

Open roles in category
311
Median days open
69 d
Category median salary (all employers)
$200k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How Samsung Semiconductor compares in Memory Design hiring
Metric Samsung Semiconductor All employers we track in this specialty (311 roles · 30 employers)
Open roles in this specialty 3 311
Median days open 4 d 69 d (−65 d vs this employer)
Median salary (USD postings) — $200k

Skills observed across this category: layout design, memory unit cell array, Calibre DRC, LVS, parametric cells

Who's hiring in this category

  • Micron Technology · 160 open roles · median 79 d
  • Synopsys · 32 open roles · median 74 d
  • Qualcomm · 19 open roles · median 95 d
  • Broadcom · 16 open roles · median 75 d
  • SanDisk · 15 open roles · median 4 d
  • NVIDIA · 8 open roles · median 56 d

How we counted: 311 open Memory Design (Memory Design) roles from 30 employers tracked in the SemiconductorJobs index, counted 3 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.

Samsung Semiconductor

Samsung Semiconductor

Apply now
San Jose, California, United States
On-site
Full-time
$189,000 - $301,000 USD yearly
1 day ago

Share this job